Datasheet

XIO2213B
www.ti.com SCPS210F –OCTOBER 2008–REVISED MAY 2013
Bit 7 (PROT_SEL) in the serial-bus control and status register changes the serial-bus protocol. Each of
the three previous serial-bus protocol figures show the PROT_SEL bit default (logic low). When this
control bit is asserted, the word address and corresponding acknowledge are removed from the serial-bus
protocol. This feature allows the system designer a second serial-bus protocol option when selecting
external EEPROM devices.
3.5.3 Serial-Bus EEPROM Application
The registers and corresponding bits that are loaded through the EEPROM are provided in Table 3-4.
Table 3-4. EEPROM Register Loading Map
SERIAL EEPROM
BYTE DESCRIPTION
WORD ADDRESS
00h PCIe to PCI bridge function indicator (00h)
01h Number of bytes to download (1Eh)s
02h PCI 84h, subsystem vendor ID, byte 0
03h PCI 85h, subsystem vendor ID, byte 1
04h PCI 86h, subsystem ID, byte 0s
05h PCI 87h, subsystem ID, byte 1s
06h PCI D4h, general control, byte 0
07h PCI D5h, general control, byte 1
08h PCI D6h, general control, byte 2
09h PCI D7h, general control, byte 3
0Ah TI Proprietary register load 00h (PCI D8h)
0Bh TI Proprietary register load 00h (PCI D9h)
0Ch Reserved — no bits loaded 00h (PCI DAh)
0Dh PCI DCh, arbiter control
0Eh PCI DDh, arbiter request mask
0Fh PCI C0h, TL control and diagnostic register, byte 0
10h PCI C0h, TL control and diagnostic register, byte 1
11h PCI C0h, TL control and diagnostic register, byte 2
12h PCI C0h, TL control and diagnostic register, byte 3
13h PCI C4h, DLL control and diagnostic register, byte 0
14h PCI C5h, DLL control and diagnostic register, byte 1
15h PCI C6h, DLL control and diagnostic register, byte 2
16h PCI C7h, DLL control and diagnostic register, byte 3
17h PCI C8h, PHY control and diagnostic register, byte 0
18h PCI C9h, PHY control and diagnostic register, byte 1
19h PCI CAh, PHY control and diagnostic register, byte 2
1Ah PCI CBh, PHY control and diagnostic register, byte 3
1Bh Reserved — no bits loaded 00h (PCI CEh)
1Ch Reserved — no bits loaded 00h (PCI CFh)
1Dh TI proprietary register load 00h (PCI E0h)
1Eh TI proprietary register load 00h (PCI E2h)
1Fh TI proprietary register load 00h (PCI E3h)
20h 1394 OHCI function indicator (01h)
21h Number of bytes (18h)
22h PCI 3Fh, maximum latency, bits 7-4 PCI 3Eh, minimum grant, bits 3-0
23h PCI 2Ch, subsystem vendor ID, byte 0
24h PCI 2Dh, subsystem vendor ID, byte 1
25h PCI 2Eh, subsystem ID, byte 0
Copyright © 2008–2013, Texas Instruments Incorporated Feature/Protocol Descriptions 41
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