Datasheet
XIO2001
www.ti.com
SCPS212G –MAY 2009–REVISED DECEMBER 2012
Table 3-10. Clocking In Low Power States
CLOCK SOURCE D0/L0 D1/L1 D2/L1 D3/L2/L3
PCI express reference clock input (REFCLK) On On On On/Off
Internal PCI bus clock to bridge function On Off Off Off
The link power management (LPM) state machine manages active state power by monitoring the PCI
Express transaction activity. If no transactions are pending and the transmitter has been idle for at least
the minimum time required by the PCI Express Specification, then the LPM state machine transitions the
link to either the L0s or L1 state. By reading the bridge’s L0s and L1 exit latency in the link capabilities
register, the system software may make an informed decision relating to system performance versus
power savings. The ASLPMC field in the link control register provides an L0s only option, L1 only option,
or both L0s and L1 option.
3.16 Auto Pre-Fetch Agent
The auto pre-fetch agent is an internal logic module that will generate speculative read requests on behalf
of a PCI master to improve upstream memory read performance.
The auto pre-fetch agent will generate a read thread on the PCI-express bus when it receives an
upstream prefetchable memory read request on the PCI bus. A read thread is a sequence of one or more
read requests with contiguous read addresses. The first read of thread will be started by a master on the
PCI bus requesting a read that is forwarded to the root complex by the bridge. Each subsequent read in
the thread will be initiated by the auto pre-fetch agent. Each subsequent read will use the address that
immediately follows the last address of data in the previous read of the thread. Each read request in the
thread will be assigned to an upstream request processor. The pre-fetch agent can issue reads for two
threads at one time, alternating between the threads.
Copyright © 2009–2012, Texas Instruments Incorporated Feature/Protocol Descriptions 41
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