Datasheet
www.ti.com
PD
CW0
CW1
CW2
CW3
CW4
D_IN
CLK
D_OUT
RST
DVDD
CW5
CW6
CW7
CW8
CW9
OUT8
OUT8
OUT7
OUT7
OUT6
OUT6
OUT5
OUT5
OUT1
OUT1
OUT2
OUT2
OUT3
OUT3
OUT4
OUT4
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
CW1
CW0
PD
IN5
CW2
CW3
CW4
DIN
CLK
DOUT
RST
+3.3V
CW5
CW6
CW7
CW8
CW9
OUT5N
VBL1
1
2
3
5
6
7
8
VBL2
VBL3
4
IN2
VBL4
IN3
IN1
AVDD1
IN4
9
10
11
13
14
15
16
VB1
VB5
12
VB3
AVDD1
V
CM
V
CNTRL
AVDD2
VBL5
VBL6
VBL7
IN6
VBL8
IN7
IN5
AVDD1
IN8
VB4
V
REFH
VB6
AVDD1
V
REFL
AVDD2
VB2
C
22
0.1 Fm
C
3
0.1 Fm
C
7
0.1 Fm
C
36
2.2 Fm
C
23
0.1 Fm
C
24
0.1 Fm
C
33
0.1 Fm
C
41
C
34
0.1 Fm
C
35
0.1 Fm
C
25
0.1 Fm
C
13
1 Fm
C
31
0.1 Fm
+3.3V
IN6
C
14
1 Fm
C
32
0.1 Fm
IN7
C
15
1 Fm
+3.3V
C
14
0.1 Fm
IN8
C
16
1 Fm
48
47
46
44
43
42
41
45
40
39
38
36
35
34
33
37
VCA8500
OUT_QFN_RGC-64
+5V
R
10
0W
OUT5P
R
11
0W
OUT6N
C
42
R
12
0W
OUT6P
R
13
0W
OUT7N
C
43
R
14
0W
OUT7P
R
15
0W
OUT8N
C
44
R
16
0W
OUT8P
R
17
0W
OUT1N
C
37
R
3
0W
OUT1P
R
2
0W
OUT2N
C
38
R
5
0W
OUT2P
R
4
0W
OUT3N
C
39
R
7
0W
OUT3P
R
6
0W
OUT4N
C
40
R
9
0W
OUT4P
R
8
0W
IN1
C
10
0.1 Fm
C
17
2.2 Fm
C
6
0.1 Fm
C
4
0.01 Fm
C
19
0.1 Fm
C
20
0.1 Fm
C
28
0.1 Fm
C
27
2.2 Fm
C
26
0.1 Fm
C
21
0.1 Fm
C
9
1 Fm
C
30
2.2 Fm
+3.3V
IN2
C
10
1 Fm
C
29
0.1 Fm
IN3
Flag
PAD
C
11
1 Fm
+3.3V
C
5
0.1 Fm
IN4
C
12
1 Fm
+5V
C
2
0.1 Fm
C
1
0.1 Fm
R
1
100W
V
CONTROL
VCA8500
SBOS390A – JANUARY 2008 – REVISED MARCH 2008
(1) V
CONTROL
: Values for R
1
and C
4
should be selected for a desired time constant.
(2) Optional components: Values for R
2
to R
17
and C
37
to C
44
should be selected based on the analog-to-digital converter selected.
(3) The +3.3V supply connections for DVDD and AVDD1 should be joined to a low-noise +3.3V system supply. Consider filtering any supply
noise with an LC filter.
Figure 70. Typical Connection Diagram
32 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): VCA8500