Datasheet

UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ
LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR
SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
operation of the quick start-up circuit (continued)
R3 +
0.9 t
M
seconds
C2(F) ȏn
ǒ
1 *
V
IN
(V)*1.6
V
IN
(V)
Ǔ
Ohms
(8)
After the CT capacitor has charged up for a time equal to 0.9 × t
M
, Q1 turns off and allows the SD/CT pin to
be pulled back to –1.5 V with respect to GND through a 50-kΩ resistor. At this point , the SD/CT pin can be used
by the UCC384 overcurrent timing control.
minimum V
IN
to V
OUT
delay time
Although it may desirable to have as short a delay time as possible, a small portion of this delay time is fixed
by the UCC384 and cannot be shortened. This is shown in Figure 12, where the CT capacitor has been removed
from the circuit completely, giving a fixed VIN to VOUT delay of approximately 150 µs for a circuit with VIN = –6 V
and VOUT = –5 V.
thermal design
The Packaging Information section of the Power Supply Control Products Data Book (TI Literature
No. SLUD003) contains reference material for the thermal ratings of various packages. The section also
includes an excellent article entitled Thermal Characteristics of Surface Mount Packages, which is the basis
for the following discussion.
Thermal design for the UCC384 includes two modes of operation, normal and pulsed. In normal mode, the linear
regulator and heat sink must dissipate power equal to the maximum forward voltage drop multiplied by the
maximum load current. Assuming a constant current load, the expected heat rise at the regulator’s junction can
be calculated as follows:
t
RISE
+ P
DISS
(
qjc ) qca
)
(9)
Theta (θ) is the thermal resistance and P
DISS
is the power dissipated. The junction-to-case thermal resistance
(θjc) of the SOIC–8 DP package is 22°C/W. In order to prevent the regulator from going into thermal shutdown,
the case-to-ambient thermal resistance (θca) must keep the junction temperature below 150°C. If the UCC384
is mounted on a 5 square inch pad of 1-ounce copper, for example, the thermal resistance (θja) becomes
40–70°C/W. If a lower thermal resistance is required for the application, the device heat sinking needs to be
improved.
When the UCC384 is in a pulsed mode, due to an overcurrent condition, the maximum average power
dissipation is calculated as follows:
P
avg
+
ƪ
V
IN
(V) * V
OUT
(V)
ƫ
I
PEAK
(A) ǒ
t
ON
(seconds)
40 t
ON
(seconds)
ǓWatts
(10)
As seen in equation (10), the average power during a fault is reduced dramatically by the duty cycle, allowing
the heat sink to be sized for normal operation. Although the peak power in the regulator during the t
ON
period
can be significant, the thermal mass of the package normally keeps the junction temperature from rising unless
the t
ON
period is increased to several milliseconds.