Datasheet

UCC28070A

www.ti.com

SLUSAW0 –MARCH 2012

TERMINAL FUNCTIONS (continued)

NAME PIN # I/O DESCRIPTION

Phase B Current Amplifier Output. Output of phase B’s transconductance current amplifier.

Internally connected to the inverting input of phase B’s PWM comparator for trailing-edge

CAOB 11 O

modulation. Connect the current regulation loop compensation components between this pin and

GND.

Phase A Current Amplifier Output. Output of phase A’s transconductance current amplifier.

Internally connected to the inverting input of phase A’s PWM comparator for trailing-edge

CAOA 12 O

modulation. Connect the current regulation loop compensation components between this pin and

GND.

6-V Reference Voltage and Internal Bias Voltage. Connect a 0.1-μF ceramic bypass capacitor

VREF 13 O

as close as possible to this pin and GND.

Phase A’s Gate Drive. This limited-current output is intended to connect to a separate gate-drive

GDA 14 O device suitable for driving the Phase A switching component(s). The output voltage is typically

clamped to 13.5 V.

Bias Voltage Input. Connect a 0.1-μF ceramic bypass capacitor as close as possible to this pin

VCC 15 I

and GND.

Device Ground Reference. Connect all compensation and programming resistor and capacitor

GND 16 I/O networks to this pin. Connect this pin to the system through a separate trace for high-current

noise isolation.

Phase B’s Gate Drive. This limited-current output is intended to connect to a separate gate-

GDB 17 O drivedevice suitable for driving the Phase B switching component(s). The output voltage is

typically clamped to 13.5 V.

Soft-Start and External Fault Interface. Connect a capacitor to GND on this pin to set the soft-

start slew rate based on an internally-fixed 10-μA current source. The regulation reference

voltage for VSENSE is clamped to V

until V

exceeds 3 V. Upon recovery from certain fault

SS 18 I

conditions a 1-mA current source is present at the SS pin until the SS voltage equals the

VSENSE voltage. Pulling the SS pin below 0.6 V immediately disables both GDA and GDB

outputs.

Timing Resistor. Oscillator frequency programming pin. A resistor to GND sets the running

RT 19 I

frequency of the internal oscillator.

Maximum Duty-Cycle Resistor. Maximum PWM duty-cycle programming pin. A resistor to GND

DMAX 20 I

sets the PWM maximum duty-cycle based on the ratio of R

DMX

Product Folder Link(s): UCC28070A