Datasheet

SCLK
GLCO
23-Bit Frequency Control
Start Bit DCO Reset Bit
MSB
>128 SCLK
1 SCLK
7 SCLK23 SCLK
1 SCLK
LSB
22 21
0
TVP5150AM1
www.ti.com SLES209E–NOVEMBER 2007– REVISED OCTOBER 2011
3.17 Genlock Control (GLCO) and RTC
A Genlock control function is provided to support a standard video encoder to synchronize its internal
color oscillator for properly reproduced color with unstable timebase sources such as VCRs.
The frequency control word of the internal color subcarrier digitally tuned oscillator (DTO) and the
subcarrier phase reset bit are transmitted via terminal 23 (GLCO). The frequency control word is a 23-bit
binary number. The frequency of the DTO can be calculated from the following equation:
f
dto
= (f
ctrl
/2
23
) × f
sclk
where f
dto
is the frequency of the DTO, f
ctrl
is the 23-bit DTO frequency control, and f
sclk
is the frequency of
the SCLK.
3.17.1 GLCO Interface
A write of 1 to bit 4 of the chrominance control register at I
2
C subaddress 1Ah causes the subcarrier DTO
phase reset bit to be sent on the next scan line on GLCO. The active-low reset bit occurs seven SCLKs
after the transmission of the last bit of DTO frequency control. Upon the transmission of the reset bit, the
phase of the TVP5150AM1 internal subcarrier DTO is reset to zero.
A Genlock slave device can be connected to the GLCO terminal and uses the information on GLCO to
synchronize its internal color phase DTO to achieve clean line and color lock.
Figure 3-9 shows the timing diagram of the GLCO mode.
Figure 3-9. GLCO Timing
Copyright © 2007–2011, Texas Instruments Incorporated Functional Description 23
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