Datasheet

THERMAL CHARACTERISTICS
SWITCHING CHARACTERISTICS
TSB41BA3D
www.ti.com ............................................................................................................................................... SLLS959A – DECEMBER 2008 – REVISED MARCH 2009
PARAMETER TEST CONDITION MIN TYP MAX UNIT
R
θ JA
Junction-to-free-air thermal resistance Board-mounted, no air flow, high conductivity Texas 19.04 ° C/W
Instruments-recommended test board, chip soldered or
R
θ JC
Junction-to-case-thermal resistance 0.17 ° C/W
greased to thermal land with 2-oz. copper.
R
θ JA
Junction-to-free-air thermal resistance Board-mounted, no air flow, high-conductivity Texas 31.52 ° C/W
Instruments recommended test board with thermal land
but no solder or grease thermal connection to thermal
R
θ JC
Junction-to-case-thermal resistance 0.17 ° C/W
land with 2-oz. copper.
R
θ JA
Junction-to-free-air thermal resistance 49.17 ° C/W
Board-mounted, no air flow, high-conductivity JEDEC
test board with 1-oz. copper
R
θ JC
Junction-to-case-thermal resistance 3.11 ° C/W
R
θ JA
Junction-to-free-air thermal resistance Two-sided JEDEC test card, no air flow 52.66 ° C/W
PARAMETER TEST CONDITION MIN TYP MAX UNIT
1394a-2000 0.3 0.8 ns
t
r
TP differential rise time, transmit 10% to 90%, At 1394 connector
1394a-2000 S400B 80 800 ps
1394a-2000 0.3 0.8 ns
t
f
TP differential fall time, transmit 90% to 10%, At 1394 connector
1394a-2000 S400B 80 800 ps
Setup time, CTL0, CTL1, D1 – D7,
t
su
1394a-2000 50% to 50%, See Figure 2 2.5 ns
LREQ to PCLK
Hold time, CTL0, CTL1, D1 – D7, LREQ
t
h
1394a-2000 50% to 50%, See Figure 2 0 ns
after PCLK
Setup time, CTL0, CTL1, D1 – D7,
t
su
1394b 50% to 50%, See Figure 2 2.5 ns
LREQ to LCLK_PMC
Hold time, CTL0, CTL1, D1 – D7, LREQ
t
h
1394b 50% to 50%, See Figure 2 0 ns
after LCLK_PMC
Delay time, PCLK to CTL0, CTL1, 1394a-2000 and
t
d
50% to 50%, See Figure 3 0.5 7 ns
D1 – D7, PINT 1394b
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