Datasheet

V =xV
N OUT
10.5 Vm
RMS
V
TPS799xx
www.ti.com SBVS056J –JANUARY 2005–REVISED AUGUST 2010
Noise can be referred to the feedback point (FB pin) Startup
such that with C
NR
= 0.01mF total noise is
Fixed voltage versions of the TPS799xx use a
approximately given by Equation 1:
quick-start circuit to fast-charge the noise reduction
capacitor, C
NR
, if present (see Functional Block
(1)
Diagrams, Figure 1). This allows the combination of
very low output noise and fast start-up times. The NR
The TPS79901 adjustable version does not have the
pin is high impedance so a low leakage C
NR
capacitor
noise-reduction pin available, so ultra-low noise
must be used; most ceramic capacitors are
operation is not possible. Noise can be minimized
appropriate in this configuration.
according to the above recommendations.
Note that for fastest startup, V
IN
should be applied
Board Layout Recommendations to Improve first, then the enable pin (EN) driven high. If EN is
PSRR and Noise Performance tied to IN, startup will be somewhat slower. Refer to
Figure 25 and Figure 26 in the Typical Characteristics
To improve ac performance such as PSRR, output
section. The quick-start switch is closed for
noise, and transient response, it is recommended that
approximately 135ms. To ensure that C
NR
is fully
the board be designed with separate ground planes
charged during the quick-start time, a 0.01mF or
for V
IN
and V
OUT
, with each ground plane connected
smaller capacitor should be used.
only at the GND pin of the device. In addition, the
ground connection for the bypass capacitor should
Transient Response
connect directly to the GND pin of the device.
As with any regulator, increasing the size of the
Internal Current Limit output capacitor will reduce over/undershoot
magnitude but increase duration of the transient
The TPS799xx internal current limit helps protect the
response. In the adjustable version, adding C
FB
regulator during fault conditions. During current limit,
between OUT and FB will improve stability and
the output will source a fixed amount of current that is
transient response. The transient response of the
largely independent of output voltage. For reliable
TPS799xx is enhanced by an active pull-down that
operation, the device should not be operated in
engages when the output overshoots by
current limit for extended periods of time.
approximately 5% or more when the device is
enabled. When enabled, the pull-down device
The PMOS pass element in the TPS799xx has a
behaves like a 350Ω resistor to ground.
built-in body diode that conducts current when the
voltage at OUT exceeds the voltage at IN. This
current is not limited, so if extended reverse voltage Under-Voltage Lock-Out (UVLO)
operation is anticipated, external limiting may be
The TPS799xx utilizes an under-voltage lock-out
appropriate.
circuit to keep the output shut off until internal
circuitry is operating properly. The UVLO circuit has a
Shutdown
de-glitch feature so that it will typically ignore
undershoot transients on the input if they are less
The enable pin (EN) is active high and is compatible
than 50ms duration.
with standard and low voltage TTL-CMOS levels.
When shutdown capability is not required, EN can be
connected to IN. Minimum Load
The TPS799xx is stable and well-behaved with no
Dropout Voltage
output load. To meet the specified accuracy, a
minimum load of 500mA is required. Below 500mA at
The TPS799xx uses a PMOS pass transistor to
junction temperatures near +125°C, the output can
achieve low dropout. When (V
IN
– V
OUT
) is less than
drift up enough to cause the output pull-down to turn
the dropout voltage (V
DO
), the PMOS pass device is
on. The output pull-down will limit voltage drift to 5%
in its linear region of operation and the input-to-output
typically but ground current could increase by
resistance is the R
DS, ON
of the PMOS pass element.
approximately 50mA. In typical applications, the
Because the PMOS device behaves like a resistor in
junction cannot reach high temperatures at light loads
dropout, V
DO
will approximately scale with output
since there is no appreciable dissipated power. The
current.
specified ground current would then be valid at no
As with any linear regulator, PSRR and transient
load in most applications.
response are degraded as (V
IN
– V
OUT
) approaches
dropout. This effect is shown in Figure 18 through
Figure 20 in the Typical Characteristics section.
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