Datasheet

TPS796
SLVS351O –SEPTEMBER 2002–REVISED NOVEMBER 2013 www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
PRODUCT V
OUT
(2)
TPS796xx yyy z XX is nominal output voltage (for example, 28 = 2.8V, 01 = Adjustable).
YYY is package designator.
Z is package quantity.
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Output voltages from 1.3V to 4.9V in 100mV increments are available; minimum order quantities may apply. Contact factory for details
and availability.
ABSOLUTE MAXIMUM RATINGS
(1)
Over operating temperature range (unless otherwise noted).
UNIT
V
IN
range –0.3V to 6V
V
EN
range –0.3V to V
IN
+ 0.3V
V
OUT
range 6V
Peak output current Internally limited
ESD rating, HBM 2kV
ESD rating, CDM 500V
Continuous total power dissipation See Thermal Information Table
Junction temperature range, T
J
–40°C to +150°C
Storage temperature range, T
stg
–65°C to +150°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
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