Datasheet

TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F – JUNE 1995 – REVISED JANUARY 1999
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS7301Q electrical characteristics at I
O
= 10 mA, V
I
= 3.5 V, EN = 0 V, C
o
= 4.7 µF (CSR
= 1 ), FB
shorted to OUT at device leads (unless otherwise noted)
PARAMETER
TEST CONDITIONS
T
J
MIN TYP MAX
UNIT
25°C 1.182 V
Reference voltage (measured at FB)
2.5 V V
I
10 V,
See Note 1
5 mA I
O
500 mA,
–40°C to 125°C 1.147 1.217 V
Reference voltage temperature
coefficient
–40°C to 125°C 61 75 ppm/°C
V
I
=24V
50 µA I
O
150 mA
25°C 0.7 1
V
I
=
2
.
4
V
,
50
µ
A
I
O
150
mA
–40°C to 125°C 1
V
I
=24V
150 mA I
O
500 mA
25°C 0.83 1.3
Pass-element series resistance
V
I
=
2
.
4
V
,
150
mA
I
O
500
mA
–40°C to 125°C 1.3
(See Note 2)
V
I
=29V
50 µA I
O
500 mA
25°C 0.52 0.85
V
I
=
2
.
9
V
,
50
µ
A
I
O
500
mA
–40°C to 125°C 0.85
V
I
= 3.9 V, 50 µA I
O
500 mA 25°C 0.32
V
I
= 5.9 V, 50 µA I
O
500 mA 25°C 0.23
In
p
ut regulation
V
I
= 2.5 V to 10 V, 50
µ
A I
O
500 mA,
25°C 3 18
mV
Inp
u
t
reg
u
lation
I
,
See Note 1
µ
O
,
–40°C to 125°C 25
mV
2.5 V V
I
10 V, I
O
= 5 mA to 500 mA,
25°C 5 14
mV
Out
p
ut regulation
I
,
See Note 1
O
,
–40°C to 125°C 25
mV
O
u
tp
u
t
reg
u
lation
2.5 V V
I
10 V, I
O
= 50
µ
A to 500 mA,
25°C 7 22
mV
I
,
See Note 1
O
µ ,
–40°C to 125°C 54
mV
I
O
=50µA
25°C 48 59
Ri
pp
le rejection
f = 120 Hz
I
O
=
50
µ
A
–40°C to 125°C 44
dB
Ripple
rejection
f
=
120
H
z
I
O
= 500 mA,
25°C 45 54
dB
O
,
See Note 1
–40°C to 125°C 44
Output noise-spectral density f = 120 Hz 25°C 2
µV/Hz
C
o
= 4.7 µF 25°C 95
Output noise voltage 10 Hz f 100 kHz
C
o
= 10 µF 25°C 89
µVrms
C
o
= 100 µF 25°C 74
RESET trip-threshold voltage
§
V
O(FB)
decreasing –40°C to 125°C 1.101 1.145 V
RESET hysteresis voltage
§
Measured at V
O(FB)
25°C 12 mV
RESET out
p
ut low voltage
§
V
I
= 2 13 V
I
O(RESET)
= 400 µA
25°C 0.1 0.4
V
RESET
ou
t
pu
t
l
ow vo
lt
age
§
V
I
=
2
.
13
V
,
I
O(RESET)
=
400
µ
A
–40°C to 125°C 0.4
V
FB in
p
ut current
25°C –10 0.1 10
nA
FB
inp
u
t
c
u
rrent
–40°C to 125°C –20 20
nA
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to C
o
.
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
§
Output voltage programmed to 2.5 V with closed-loop configuration (see application information).
NOTES: 1. When V
I
< 2.9 V and I
O
> 150 mA simultaneously, pass element r
DS(on)
increases (see Figure 33) to a point where the resulting
dropout voltage prevents the regulator from maintaining the specified tolerance range.
2. To calculate dropout voltage, use equation: V
DO
= I
O
r
DS(on)
r
DS(on)
is a function of both output current and input voltage. This parametric table lists r
DS(on)
for V
I
= 2.4 V, 2.9 V, 3.9 V, and
5.9 V, which corresponds to dropout conditions for programmed output voltages of 2.5 V, 3 V, 4 V, and 6 V respectively. For other
programmed values, refer to Figure 33.