Datasheet

Under-Voltage Lock-Out (UVLO)
Minimum Load
Power Dissipation
THERMAL INFORMATION
Thermal Protection
P
D
+
ǒ
V
IN
* V
OUT
Ǔ
I
OUT
(4)
Package Mounting
TPS717xx
www.ti.com .................................................................................................................................................. SBVS068G – FEBRUARY 2006 – REVISED APRIL 2009
+35 ° C above the maximum expected ambient
condition of your particular application. This
The TPS717xx utilizes an under-voltage lock-out
configuration produces a worst-case junction
circuit to keep the output shut off until internal
temperature of +125 ° C at the highest expected
circuitry is operating properly. The UVLO circuit has a
ambient temperature and worst-case load.
de-glitch feature so that it typically ignores
undershoot transients on the input if they are less The internal protection circuitry of the TPS717xx has
than 50 µ s duration. been designed to protect against overload conditions.
It was not intended to replace proper heatsinking.
Continuously running the TPS717xx into thermal
shutdown will degrade device reliability.
The TPS717xx is stable and well-behaved with no
output load. Traditional PMOS LDO regulators suffer
from lower loop gain at very light output loads. The
The ability to remove heat from the die is different for
TPS717xx employs an innovative low-current mode
each package type, presenting different
circuit to increase loop gain under very light or
considerations in the printed circuit board (PCB)
no-load conditions, resulting in improved output
layout. The PCB area around the device that is free
voltage regulation performance down to zero output
of other components moves the heat from the device
current.
to the ambient air. Performance data for JEDEC low-
and high-K boards are given in the Dissipation
Ratings table. Using heavier copper will increase the
effectiveness in removing heat from the device. The
addition of plated through-holes to heat-dissipating
Thermal protection disables the output when the
layers also improves the heatsink effectiveness.
junction temperature rises to approximately +160 ° C,
Power dissipation depends on input voltage and load
allowing the device to cool. When the junction
conditions. Power dissipation (P
D
) is equal to the
temperature cools to approximately +140 ° C the
product of the output current times the voltage drop
output circuitry is again enabled. Depending on power
across the output pass element (V
IN
to V
OUT
), as
dissipation, thermal resistance, and ambient
shown in Equation 4 :
temperature, the thermal protection circuit may cycle
on and off. This cycling limits the dissipation of the
regulator, protecting it from damage because of
overheating.
Any tendency to activate the thermal protection circuit
Solder pad footprint recommendations for the
indicates excessive power dissipation or an
TPS717xx are available from the Texas Instruments
inadequate heatsink. For reliable operation, junction
web site at www.ti.com .
temperature should be limited to +125 ° C maximum.
To estimate the margin of safety in a complete design
(including heatsink), increase the ambient
temperature until the thermal protection is triggered;
use worst-case loads and signal conditions. For good
reliability, thermal protection should trigger at least
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