Datasheet

TPS65910 , TPS65910A , TPS65910A3 , TPS659101
TPS659102 , TPS659103 , TPS659104 , TPS659105
TPS659106, TPS659107, TPS659108, TPS659109
SWCS046U –MARCH 2010–REVISED JUNE 2014 www.ti.com
4.1 Signal Descriptions
Table 4-1. Signal Descriptions
NAME QFN PIN SUPPLIES TYPE I/O DESCRIPTION PU/PD
VDDIO VDDIO/DGND Power I Digital I/Os supply No
I
2
C bidirectional data signal/serial
SDA_SDI VDDIO/DGND Digital I/O peripheral interface data input External PU
(multiplexed)
I
2
C bidirectional clock signal/serial
SCL_SCK VDDIO/DGND Digital I/O peripheral interface Clock Input External PU
(multiplexed)
I
2
C SmartReflex bidirectional data
SDASR_EN2 VDDIO/DGND Digital I/O External PU
signal/enable of supplies (multiplexed)
I
2
C SmartReflex bidirectional clock
SCLSR_EN1 VDDIO/DGND Digital I/O External PU
signal/enable of supplies (multiplexed)
Active-sleep state transition control Programmable PD
SLEEP VDDIO/DGND Digital I
signal (default active)
Configurable general-purpose I/O or
Programmable PD
GPIO_CKSYNC VDDIO/DGND Digital I/O DC-DCs synchronization clock input
(default active)
signal
Programmable PD
PWRHOLD VRTC/DGND Digital I Switch-on/-off control signal
(default active)
Programmable PU
PWRON VBAT/DGND Digital I External switch-on control (ON button)
(default active)
PD active during
NRESPWRON VDDIO/DGND Digital O Power off reset
device OFF state
INT1 VDDIO/DGND Digital O Interrupt flag No
Programmable PD
BOOT0 VRTC/DGND Digital I Power-up sequence selection
(default active)
Programmable PD
BOOT1 VRTC/DGND Digital I Power-up sequence selection
(default active)
PD disable in
CLK32KOUT VDDIO/DGND Digital O 32-kHz clock output ACTIVE or SLEEP
state
OSC32KIN VRTC/REFGND Analog I 32-kHz crystal oscillator No
OSC32KOUT VRTC/REFGND Analog I 32-kHz crystal oscillator No
VREF VCC7/REFGND Analog O Bandgap voltage No
REFGND REFGND Analog I/O Reference ground No
TESTV VCC7/AGND Analog O Analog test output (DFT) No
Backup battery input (short to VCC5 if
VBACKUP VBACKUP/AGND Power I No
not used)
VCC1 VCC1/GND1 Power I VDD1 DC-DC power input No
GND1 VCC1/GND1 Power I/O VDD1 DC-DC power ground No
SW1 VCC1/GND1 Power O VDD1 DC-DC switched output No
VFB1 VCC7/AGND Analog I VDD1 feedback voltage PD
VCC2 VCC2/GND2 Power I VDD2 DC-DC power input No
GND2 VCC2/GND2 Power I/O VDD2 DC-DC power ground No
SW2 VCC2/GND2 Power O VDD2 DC-DC switched output No
VFB2 VCC4/AGND2 Analog I VDD2 DC-DC feedback voltage PD
VCCIO VCCIO/GNDIO Power I VIO DC-DC power input No
GNDIO VCCIO/GNDIO Power I/O VIO DC-DC power ground No
SWIO VCCIO/GNDIO Power O VIO DC-DC switched output No
VFBIO VCC7/AGND Analog I VIO feedback voltage PD
VCC3 VCC3/AGND2 Power I VMMC VAUX33 power input No
VMMC VCC3/REFGND Power O LDO regulator output PD
8 Terminal Configuration and Functions Copyright © 2010–2014, Texas Instruments Incorporated
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TPS659105 TPS659106 TPS659107 TPS659108 TPS659109