Datasheet

TPS65217A, TPS65217B, TPS65217C, TPS65217D
www.ti.com SLVSB64F –NOVEMBER 2011–REVISED APRIL 2013
ELECTRICAL CHARACTERISTICS (continued)
V
BAT
= 3.6 V ±5%, T
J
= 27ºC (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
External resistor divider (XADJ2 = 1) 0.6 V
IN
Output voltage range V
I
2
C selectable in 25-mV steps
0.9 3.3
(XADJ2 = 0)
V
OUT
V
IN
= V
OUT
+ 0.3 V to 5.8 V;
DC output voltage accuracy -2 3 %
0 mA ≤ I
OUT
≤ 1.2 A
I
OUT
= 1 mA, PFM mode
Power save mode (PSM) ripple voltage 40 mV
pp
L = 2.2 µH, C
OUT
= 20 µF
I
OUT
Output current range 0 1.2 A
High side MOSFET on-resistance V
IN
= 2.7 V 170
R
DS(ON)
mΩ
Low side MOSFET on-resistance V
IN
= 2.7 V 120
High side MOSFET leakage current V
IN
= 5.8 V 2
I
LEAK
µA
Low side MOSFET leakage current V
DS
= 5.8 V 1
Current limit (high and low side
I
LIMIT
2.7 V < V
IN
< 5.8 V 1.6 A
MOSFET).
f
SW
Switching frequency 1.95 2.25 2.55 MHz
V
FB
Feedback voltage XADJ = 1 600 mV
t
SS
Soft-start time Time to ramp V
OUT
from 5% to 95%, no load 750 µs
R
DIS
Internal discharge resistor at L2 250 Ω
L Inductor 1.5 2.2 µH
Output capacitor Ceramic 10 22 µF
C
OUT
ESR of output capacitor 20 mΩ
DCDC3 (BUCK)
V
IN
Input voltage range VIN_DCDC3 pin 2.7 V
SYS
V
I
Q,SLEEP
Quiescent current in SLEEP mode No load, V
SYS
= 4 V, T
A
= 25°C 30 µA
External resistor divider (XADJ3 = 1) 0.6 V
IN
Output voltage range V
I
2
C selectable in 25-mV steps
0.9 1.5
(3)
(XADJ3 = 0)
V
OUT
V
IN
= V
OUT
+ 0.3 V to 5.8 V;
DC output voltage accuracy -2 3 %
0 mA ≤ I
OUT
≤ 1.2 A
I
OUT
= 1 mA, PFM mode
Power save mode (PSM) ripple voltage 40 mV
pp
L = 2.2 µH, C
OUT
= 20 µF
I
OUT
Output current range 0 1.2 A
High side MOSFET on-resistance V
IN
= 2.7 V 170
R
DS(ON)
mΩ
Low side MOSFET on-resistance V
IN
= 2.7 V 120
High side MOSFET leakage current V
IN
= 5.8 V 2
I
LEAK
µA
Low side MOSFET leakage current V
DS
= 5.8 V 1
Current limit (high and low side
I
LIMIT
2.7 V < V
IN
< 5.8 V 1.6 A
MOSFET).
f
SW
Switching frequency 1.95 2.25 2.55 MHz
V
FB
Feedback voltage XADJ = 1 600 mV
t
SS
Soft-start time Time to ramp V
OUT
from 5% to 95%, no load 750 µs
R
DIS
Internal discharge resistor at L1, L2 250 Ω
L Inductor 1.5 2.2 µH
Output capacitor Ceramic 10 22 µF
C
OUT
ESR of output capacitor 20 mΩ
LDO1, LDO2
V
IN
Input voltage range 1.8 5.8 V
I
Q,SLEEP
Quiescent current in SLEEP mode No load, V
SYS
= 4 V, T
A
= 25°C 5 µA
(3) Contact factory for 3.3-V option.
Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Links: TPS65217A TPS65217B TPS65217C TPS65217D