Datasheet

PRODUCTPREVIEW
VREF – 1
nINT – 2
VNEG – 3
VNEG_IN – 4
WAKEUP – 5
DGND – 6
INT_LDO – 7
AGND1 – 8
N/C – 9
VIN – 10
N/C – 11
VCOM_CTRL – 12
23 – PBKG
22 – PWRUP
21 – N/C
20 – N/C
19 – N/C
18 – SDA
17 – SCL
16 – VCOM_PWR
15 – N/C
14 – VCOM
13 – N/C
24 – PWR_GOODVDDH_IN – 37
N/C – 38
N/C – 39
VB_SW – 40
PGND1 – 41
VB – 42
VPOS_IN – 43
VPOS – 44
VIN3P3 – 45
V3P3 – 46
TS – 47
AGND2 – 48
36 – VDDH_DRV 26 – N/C 35 – VDDH_D 34 – VDDH_FB 33 – PGND2 32 – VEE_FB 31 – VEE_D 27 – VIN_P 30 – VEE_DRV 29 – VEE_IN 28 – VN 25 – VN_SW
RGZ PACKAGE
(TOP VIEW)
TPS65186
www.ti.com SLVSB04 –JULY 2011
ORDERING INFORMATION
(1)
T
A
PACKAGE
(2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
-10°C to 85°C RGZ TPS65186RGZR TPS65186
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
DEVICE INFORMATION
TERMINAL FUNCTIONS
(3)
TERMINAL
I/O DESCRIPTION
NAME NO.
VREF 1 O Filter pin for 2.25-V internal reference to ADC
nINT 2 O Open drain interrupt pin (active low)
VNEG 3 O Negative supply output pin for panel source drivers
VNEG_IN 4 I Input pin for LDO2 (VNEG)
Wake up pin (active high). Pull this pin high to wake up from sleep mode. IC accepts I
2
C
WAKEUP 5 I commands after WAKEUP pin is pulled high but power rails remain disabled until
PWRUP pin is pulled high.
DGND 6 Digital ground. Connect to ground plane.
INT_LDO 7 O Filter pin for 2.7-V internal supply
AGND1 8 Analog ground for general analog circuitry
(3) There will be 0-ns, 93.75-µs, 62.52-µs of deglitch for PWRx, WAKEUP, and VCOM_CTRL, respectively.
Copyright © 2011, Texas Instruments Incorporated 3