Datasheet
PRODUCTPREVIEW
TPS65186
www.ti.com
SLVSB04 –JULY 2011
ENABLE (ENABLE)
Address – 0x01h
DATA BIT D7 D6 D5 D4 D3 D2 D1 D0
FIELD NAME ACTIVE STANDBY V3P3_EN VCOM_EN VDDH_EN VPOS_EN VEE_EN VNEG_EN
READ/WRITE R/W R/W R/W R/W R/W R/W R/W R/W
RESET VALUE 0 0 0 0 0 0 0 0
FIELD NAME BIT DEFINITION
(1)
STANDBY to ACTIVE transition bit
1 – Transition from STANDBY to ACTIVE mode. Rails power up as defined by UPSEQx registers
ACTIVE
0 – no effect
NOTE: After transition bit is cleared automatically
STANDBY to ACTIVE transition bit
1 – Transition from STANDBY to ACTIVE mode. Rails power up as defined by DWNSEQx registers
STANDBY
0 – no effect
NOTE: After transition bit is cleared automatically. STANDBY bit has priority over AVTIVE.
VIN3P3 to V3P3 switch enable
V3P3_EN 1 – switch is ON
0 – switch is OFF
VCOM buffer enable
VCOM_EN 1 – enabled
0 – disabled
VDDH charge pump enable
VDDH_EN 1 – enabled
0 – disabled
VPOS LDO regulator enable
1 – enabled
VPOS_EN
0 – disabled
NOTE: VPOS cannot be enabled before VNEG is enabled.
VEE charge pump enable
VEE_EN 1 – enabled
0 – disabled
VNEG LDO regulator enable
1 – enabled
VNEG_EN
0 – disabled
NOTE: When VNEG is disabled VPOS will also be disabled.
(1) Enable bits always reflect actual status of the corresponding rail.
Copyright © 2011, Texas Instruments Incorporated 27