Datasheet

TPS65070, TPS65072, TPS65073
TPS650731, TPS650732, TPS650701, TPS650702, TPS650721
www.ti.com SLVS950G –JULY 2009–REVISED MAY 2013
If the BAT pin voltage falls below V
LOWV
in the battery detection test, it indicates that the battery has been
removed. The device then checks for battery insertion: it turns on FET Q2 and sources I
PRECHG
out of the BAT
pin for duration t
DET
. If the voltage does not rise above V
RCH
, it indicates that a battery has been inserted, and a
new charge cycle can begin. If, however, the voltage does rise above V
RCH
, it is possible that a fully charged
battery has been inserted. To check for this, I
BAT(DET)
is pulled from the battery for t
DET
: if the voltage falls below
V
LOWV
, a battery is not present. The device keeps looking for the presence of a battery.
Charge Termination On/Off:
Charge termination can be disabled by setting the Bit CHARGE TERMINATION ON/OFF in register
CHGCONFIG1 to logic high. When termination is disabled, the device goes through the pre-charge, fast-charge
and CV phases, then remains in the CV phase – the charger behaves like an LDO with an output voltage equal
to V
BAT(REG)
, able to source current up to I
CHG
or I
IN-MAX
, whichever is lesser. Battery detection is not performed.
Timers:
The charger in TPS6507x has internal safety timers for the pre-charge and fast-charge phases to prevent
potential damage to either the battery or the system. The default values for the timers can be changed in
registers CHGCONFIG1 and CHGCONFIG3. The timers can be disabled by clearing Bit SAFETY TIMERS
ENABLE in register CHGCONFIG1. (Note that the timers are disabled when termination is disabled: Bit
CHARGE TERMINATION ON/OFF in register CHGCONFIG1 =1).
Dynamic Timer Function:
The following events can reduce the charging current and increase the timer durations in the fast charge phase:
1. The system load current increases, and the DPPM loop reduces the available charging current
2. The input current is reduced because the input voltage has fallen to V
IN-LOW
3. The device has entered thermal regulation because the IC junction temperature has exceeded T
J(REG)
In each of these events, the internal timers are slowed down proportionately to the reduction in charging current.
Note also that whenever any of these events occurs, termination detection is disabled.
A modified charge cycle with the thermal loop active is shown in Figure 28.
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