Datasheet

ELECTRICAL CHARACTERISTICS
TPS650240 , , TPS650241
TPS650242 , TPS650243
TPS650244 , TPS650245
SLVS774B JUNE 2007 REVISED JULY 2009 ..............................................................................................................................................................
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VINDCDC1 = VINDCDC2 = VINDCDC3 = VCC = VINLDO = 3.6V, T
A
= 40 ° C to 85 ° C, typical values are at T
A
= 25 ° C
(unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VLDO1 and VLDO2 Low Dropout Regulators
I(q) Operating quiescent current Current per LDO into VINLDO 16 30 µ A
I(SD) Shutdown current Total current into VINLDO, VLDO = 0V 0.6 2 µ A
V
INLDO
Input voltage range for LDO1, LDO2 1.5 6.5 V
V
LDO1
LDO1 output voltage range 1.0 3.3 V
V
LDO2
LDO2 output voltage range 1.0 3.3 V
VFB LDO1 and LDO2 feedback voltage See
(1)
1.0 V
I
O
Maximum output current for LDO1, LDO2 Vin = 1.8V, Vo = 1.3V 200 mA
I
O
Maximum output current for LDO1, LDO2 Vin = 1.5V; Vo = 1.3V 120 mA
I
SC
LDO1 & LDO2 short circuit current limit V
LDO1
= GND, V
LDO2
= GND 400 mA
Minimum voltage drop at LDO1, LDO2 I
O
= 50mA, VINLDO = 1.8V 120 mV
Minimum voltage drop at LDO1, LDO2 I
O
= 50mA, VINLDO = 1.5V 65 150 mV
Minimum voltage drop at LDO1, LDO2 I
O
= 200mA, VINLDO = 1.8V 300 mV
Output voltage ccuracy for LDO1, LDO2 I
O
= 10mA 2% 1%
Line regulation for LDO1, LDO2 V
INLDO1,2
= V
LDO1,2
+ 0.5V (min. 2.5V) to 6.5V, 1% 1%
I
O
= 10mA
Load regulation for LDO1, LDO2 I
O
= 0mA to 200mA 1% 1%
Regulation time for LDO1, LDO2 Load change from 10% to 90% 10 µ s
Vdd_alive Low Dropout Regulator
Vdd_alive Vdd_alive LDO output voltage, TPS650240 to I
O
= 0mA 1.2 V
TPS650244
Vdd_alive Vdd_alive LDO output voltage, TPS650245 I
O
= 0mA 1.1 V
IO Output current for Vdd_alive 30 mA
ISC Vdd_alive short circuit current limit Vdd_alive = GND 100 mA
Output voltage accuracy for Vdd_alive I
O
= 0mA 1% 1 %
Line regulation for Vdd_alive V
CC
= Vdd_alive + 0.5 V to 6.5 V, I
O
= 0mA 1% 1 %
Regulation time for Vdd_alive Load change from 10% to 90% 10 µ s
AnaLogic Signals DEFDCDC1, DEFDCDC2, DEFDCDC3
V
IH
High level input voltage 1.3 VCC V
V
IL
Low level input voltage 0 0.1 V
I
H
Input bias current 0.001 0.05 µ A
THERMAL SHUTDOWN
T
SD
Thermal shutdown Increasing junction temperature 160 ° C
Thermal shudown hysteresis Decreasing junction temperature 20 ° C
INTERNAL UNDER VOLTAGE LOCK OUT
UVLO Internal UVLO VCC falling 3% 2.35 3% V
V
UVLO_HYST
internalUVLO comparator hysteresis 120 mV
VOLTAGE DETECTOR COMPARATOR
PWRFAIL_SNS Comparator threshold Falling threshold 2% 1.0 2% V
Hysteresis 40 50 60 mV
Propagation delay 25mV overdrive 10 µ s
V
OL
Power fail output low voltage I
OL
= 5 mA 0.3 V
(1) If the feedback voltage is forced higher than above 1.2V, a leakage current into the feedback pin may occur.
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