Datasheet

ELECTRICAL CHARACTERISTICS
TPS62510
www.ti.com
................................................................................................................................................................ SLVS651A MAY 2006 REVISED JULY 2009
VIN = 3.3 V, OVT = EN = VIN, MODE = GND, T
A
= 40 ° C to 85 ° C, typical values are at T
A
= 25 ° C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
V
I
Input voltage range 1.8 3.8 V
Power Save Mode quiescent current
FB = FB nominal + 5%, MODE = low 22 30 µ A
AVIN + PVIN
I
(q)
PWM Mode quiescent current into AVIN MODE = high 4.4 5 mA
I
(SD)
Shutdown current into PVIN + AVIN EN = low, SW = GND 0.1 5 µ A
UVL
Undervoltage lockout threshold on AVIN V
(AVIN)
falling
(1)
1.55 1.58 V
O
Undervoltage lockout hysteresis 150 mV
Thermal shutdown threshold Increasing junction temperature 160 ° C
T
(SD)
Thermal shutdown hysteresis 20 ° C
CONTROL SIGNALS EN, MODE
V
IH
High level input voltage 1.2 V
V
I
= 1.8 V to 3.8 V
V
IL
Low level input voltage 0.4 V
I
IB
Input bias current 0.01 0.1 µ A
MODE synchronization range 1.15 2.25 MHz
f
(sync)
Duration of high or low level for synchronization signal
(2)
75 ns
OUTPUT VOLTAGE TRACKING (OVT)
I
IB
Input bias current 0.001 0.05 µ A
V
OS
OVT offset voltage V
OS
= V(OVT) - V(FB), 0.1 V < V(OVT) < 0.5 V -15 15 mV
POWER GOOD (PG)
Power Good threshold Feedback voltage rising -7% V
O
-5% V
O
-3% V
O
V
V
(th)
Power Good Hysteresis 2% V
O
7% V
O
V
V
OL
Low level voltage I
(PG)
= 1 mA 0.3 V
I
lkg
Power Good leakage current V
(PG)
= 3.8 V 1 100 nA
OUTPUT
V
I
= V
(GS)
= 1.8 V 330
r
DS(on)
P-channel MOSFET on-resistance m
V
I
= V
(GS)
= 3.3 V 120 170
I
lkg
P-channel leakage current V
I
= 3.6 V 10 µ A
V
I
= V
(GS)
= 1.8 V 200
r
DS(on)
N-channel MOSFET on-resistance m
V
I
= V
(GS)
= 3.3 V 80 130
I
lkg
N-channel leakage current V
(DS)
= 3.6 V 10 µ A
I
F
Forward current limit (P- and N-channel) 1.8 V < V
I
< 3.8 V 1.75 2.00 2.25 A
f
s
Oscillator frequency MODE = high 1.3 1.5 1.7 MHz
V
ref
Reference voltage 0.6 V
V
I
= (V
O
+ 0.3 V) to 3.8 V ; -2% 5%
V
I
= (V
O
+ 0.2 V) to 3.8 V; V
O
= 1.8V,
(4)
C
2
= 15 µ F, L
1
= 2.1 µ H (effective values), -2% 2.5%
PFM operation I
OUT
= 0mA to 150mA
V
FB
Feedback voltage
(3)
V
I
= (V
O
+ 0.3 V) to 3.8 V; V
O
= 2.5V,
(4)
C
2
= 15 µ F, L
1
= 2.1 µ H (effective values), -1.3% 2.3%
I
OUT
= 0mA to 150mA
PWM operation V
I
= V
O
+ 0.3 V -1 1
I
FB
Feedback bias current V
(FB)
= 0.6 V, EN = high 0.001 0.05 µ A
V
I
= V
O
+ 0.3 V (min 1.8 V) to 3.8 V;
Line Regulation 0 %/V
I
O
= 800 mA
Load Regulation I
O
= 10 mA to 1500 mA, PWM Mode 0.1 %/A
(1) The undervoltage lockout threshold is detected at the AVIN pin. Current through the RC filter causes a UVLO trip at higher V
I
(2) The minimum and maximum duty cycle applied to the MODE pin is calculated as:
D(min) = 75 ns × f
(sync)
and D(max) = 1 - 75 ns × f
(sync)
.
(3) When using the output voltage tracking function, the feedback regulates to the voltage applied to OVT as long as the OVT < 0.6 V.
(4) Min/Max values established by characterization and not production tested. Includes line and load regulation in PFM Mode operation. For
the measurements, a proper PCB layout and usage of recommended inductors and capacitors are essential.
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