Datasheet

Circuit Use and Modifications

www.ti.com

4 Circuit Use and Modifications

Besides the required circuitry to operate the TPS6236x (outlined in a white silk screen border on the

PCB), there are additional circuits present on the TPS6236xEVM-655 that assist in evaluating the

TPS6236x as a processor power supply solution. Additionally, there are modifications that can be made to

adapt the circuit's performance to the needs of a particular application.

4.1 Load Step Circuit

The TPS6236xEVM-655 contains a simple circuit that can produce fast load current steps at the output of

the TPS6236x. This can evaluate the response of the TPS6236x to various load transients. To operate

this circuit, connect a function generator to SMA connector J10 or TP4. The output of the function

generator should be a square wave with a small duty cycle. The output high level controls the gate to

source voltage of the power transistor, Q1, and should be adjusted to generate the desired step current

high level. The output low level sets the step current low level. Good settings to start with are a square

wave signal running at 100 Hz and 5% duty cycle going from 0V to 1.5V. These settings can be adjusted

in order to generate the desired load step.

Resistor R6 is present to observe the load step current by measuring the voltage across TP2 and TP3.

Oscilloscope settings of 100mV / div translate to a current in R6 of 1A / div.

4.2 Output Voltage Buffer

The output voltage buffer circuit simply buffers the SNS+/- output with a unity gain op amp. This

transforms SNS+ and SNS- to a lower impedance signal that can be measured by high impedance

measurement equipment, such as an oscilloscope. The op amp, U2, is powered from the USB-TO-GPIO

adaptor. The USB-TO-GPIO adaptor must be installed for the output voltage buffer circuit to operate.

C13 is provided to reduce the bandwidth and noise of the input signal to the operational amplifier.

4.3 Circuit Modifications

Modifications may be made to the circuit. Any modifications will affect the performance of the EVM and

must remain within the limits of the TPS6236x IC, as detailed in the datasheet.

4.3.1 Output Capacitors

There are 3 locations for extra output capacitors to be installed in order to reduce output ripple or lessen

the voltage drop due to a load transient. C7 allows an extra capacitor to be installed near the TPS6236x

IC, while C10 and C11 allow extra capacitors to be installed closer to the point of load, which is simulated

by the load step circuit. The total output capacitance must remain below the maximum capacitance

allowed in the datasheet.

4.3.2 Input Capacitors

C9 is provided to locate additional input capacitance near the TPS6236x input. Additional capacitance at

C9 will decrease the input voltage ripple.

C8 is provided to form a complete 'PI'-type filter for the AVIN input. With the change of R1 to some small

value (around 10 Ω), the C-R-C filter is complete. This filter is not necessary for operation of the

TPS6236x.

4.3.3 I

C Pull-up Resistors

R2 and R3 are locations for optional pull-up resistors for the I

C signals. They are required when not using

the USB-TO-GPIO adaptor but are not recommended when using the adaptor. If used, their typical value

is around 2.2kΩ.

TPS6236xEVM-655 SLVU425A– April 2011–Revised July 2011

Submit Documentation Feedback