Datasheet

( )
IN OUT OUT DS(on) L
V min = V max + I max R max+ R´
TPS62230, TPS62231, TPS62232, TPS62233, TPS62234, TPS62235, TPS62236
TPS62237, TPS62238, TPS62239, TPS622310, TPS622311, TPS622312
TPS622313, TPS622314, TPS622315, TPS622316, TPS622317, TPS622318
www.ti.com SLVS941E –APRIL 2009–REVISED DECEMBER 2010
FORCED PWM MODE
Pulling the MODE pin high forces the converter to operate in a continuous conduction PWM mode even at light
load currents. The advantage is that the converter operates with a quasi fixed frequency that allows simple
filtering of the switching frequency for noise-sensitive applications. In this mode, the efficiency is lower compared
to the power-save mode during light loads.
For additional flexibility, it is possible to switch from power-save mode to forced PWM mode during operation.
This allows efficient power management by adjusting the operation of the converter to the specific system
requirements.
100% DUTY CYCLE LOW DROPOUT OPERATION
The device starts to enter 100% duty cycle mode once the input voltage comes close to the nominal output
voltage. In order to maintain the output voltage, the High Side switch is turned on 100% for one or more cycles.
With further decreasing V
IN
the High Side MOSFET switch is turned on completely. In this case the converter
offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to
achieve longest operation time by taking full advantage of the whole battery voltage range.
The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be
calculated as:
(4)
With:
I
OUT
max = maximum output current plus inductor ripple current
R
DS(on)
max = maximum P-channel switch RDSon.
R
L
= DC resistance of the inductor
V
OUT
max = nominal output voltage plus maximum output voltage tolerance
UNDER VOLTAGE LOCKOUT
The under voltage lockout circuit prevents the device from misoperation at low input voltages. It prevents the
converter from turning on the switch or rectifier MOSFET under undefined conditions. The TPS6223X devices
have a UVLO threshold set to 1.8V (typical). Fully functional operation is permitted for input voltage down to the
falling UVLO threshold level. The converter starts operation again once the input voltage trips the rising UVLO
threshold level.
SOFT START
The TPS6223X has an internal soft-start circuit that controls the ramp up of the output voltage and limits the
inrush current during start-up. This limits input voltage drops when a battery or a high-impedance power source
is connected to the input of the converter.
The soft-start system generates a monotonic ramp up of the output voltage and reaches the nominal output
voltage typically 100μs after EN pin was pulled high.
Should the output voltage not have reached its target value by this time, such as in the case of heavy load, the
converter then operates in a current limit mode set by its switch current limits.
TPS6223X is able to start into a pre-biased output capacitor. The converter starts with the applied bias voltage
and ramps the output voltage to its nominal value.
ENABLE / SHUTDOWN
The device starts operation when EN is set high and starts up with the soft start as previously described. For
proper operation, the EN pin must be terminated and must not be left floating.
Pulling the EN pin low forces the device into shutdown, with a shutdown quiescent current of typically 0.1μA. In
this mode, the P and N-channel MOSFETs are turned off, the internal resistor feedback divider is disconnected,
and the entire internal-control circuitry is switched off.
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