Datasheet
TPS62110, TPS62111
TPS62112, TPS62113
SLVS585C –JULY 2005–REVISED OCTOBER 2012
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
PLASTIC QFN 16 PIN
(1)
LBI/LBO
OUTPUT VOLTAGE MARKING
(RSA) FUNCTIONALITY
TPS62110 Adjustable 1.2 V to 16 V Standard TPS62110
TPS62111 Fixed 3.3 V Standard TPS62111
TPS62112 Fixed 5 V Standard TPS62112
TPS62113 Adjustable 1.2 V to 16 V Enhanced TPS62113
(1) The RSA package is available in tape and reel. Add R suffix (TPS62110RSAR) to order quantities of
3000 parts per reel. Add T suffix (TPS62110RSAT) to order quantities of 250 parts per reel.
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
VALUE
V
CC
Supply voltage at VIN, VINA –0.3 V to 20 V
Voltage at SW –1 V to 20 V
V
I
Voltage at EN, SYNC, LBO, PG –0.3 V to 20 V
Voltage at LBI, FB –0.3 V to 7 V
I
O
Output current at SW 2400 mA
T
J
Maximum junction temperature 150°C
T
A
Operating free-air temperature –40°C to 85°C
T
stg
Storage temperature –65°C to 150°C
Human Body Model (HBM) 2 kV
ESD
Charged Device Model (CDM) 500 V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
THERMAL INFORMATION
TPS6211x
THERMAL METRIC
(1)
UNITS
RSA (16-PINS)
θ
JA
Junction-to-ambient thermal resistance 48.2
θ
JCtop
Junction-to-case (top) thermal resistance 45.4
θ
JB
Junction-to-board thermal resistance 16.3
°C/W
ψ
JT
Junction-to-top characterization parameter 0.5
ψ
JB
Junction-to-board characterization parameter 16.4
θ
JCbot
Junction-to-case (bottom) thermal resistance 3.3
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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RECOMMENDED OPERATING CONDITIONS
MIN NOM MAX UNIT
V
CC
Supply voltage at VIN, VINA 3.1 17 V
Maximum voltage at PG, LBO, EN, SYNC 17 V
T
J
Operating junction temperature –40 125 °C
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Product Folder Links: TPS62110 TPS62111 TPS62112 TPS62113