Datasheet

www.ti.com
Design Example 4
2
3
4
5
1
9
8
7
6
10
TPS51200
REFIN
VLDOIN
VO
PGND
VOSNS
VIN
PGOOD
GND
EN
REFOUT
R3
100 kW
3.3 V
IN
PGOOD
SLP_S3
C5
0.1 mF
VTTREF
V
VLDOIN
= V
VDDQ
= 1.2 V
V
VTT
= 0.6 V
C4
1000 pF
R1
10 kW
V
VDDQ
= 1.2 V
R2
10 kW
UDG-08031
C6
4.7 mF
C8
10 mF
C7
10 mF
C3
10 mF
C2
10 mF
C1
10 mF
TPS51200
SLUS812 – FEBRUARY 2008
This design example describes a 3.3-V
IN
, LP DDR3 Configuration
Figure 28. 3.3-V
IN
, LP DDR3 Configuration
Design Example 4 List of Materials
REFERENCE
DESCRIPTION SPECIFICATION PART NUMBER MANUFACTURER
DESIGNATOR
R1, R2 10 k Ω
Resistor
R3 100 k Ω
C1, C2, C3 10 µ F, 6.3 V GRM21BR70J106KE76L Murata
C4 1000 pF
C5 Capacitor 0.1 µ F
C6 4.7 µ F, 6.3 V GRM21BR60J475KA11L Murata
C7, C8 10 µ F, 6.3 V GRM21BR70J106KE76L Murata
Copyright © 2008, Texas Instruments Incorporated 25
Product Folder Link(s): TPS51200