Datasheet

( )

2.5 10

T-Time-500 ms/div

HDRV

(2V/div)

PGOOD

(2V/div)

VOUT

(1V/div)

TPS40195

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SLUS720E –FEBRUARY 2007–REVISED JULY 2012

The ENABLE pin is self-clamping. The clamp voltage can be as low as 1 V with a 1-kΩ ground impedance. Due

to this self-clamping feature, the pull-up impedance on the ENABLE pin should be selected to limit the sink

current to less than 500 μA. Driving the ENABLE pin with a low-impedance source voltage can result in damage

to the device. Because of the self-clamping feature, it requires care when connecting multiple ENABLE pins

together. For enabling multiple TPS4019x devices (TPS40190, TPS40192, TPS40193, TPS40195, TPS40197),

see the Application Report SLVA509.

Figure 17. TPS40195 EN Pin Startup

Voltage Reference

The band gap cell is designed with a trimmed 0.591-V output. The 0.5% tolerance on the reference voltage

allows the user to design a very accurate power supply.

Oscillator and Synchronization

The TPS40195 has a programmable switching frequency of 100 kHz to 600 kHz using a resistor connected from

the RT pin to GND. The relationship between switching frequency and the resistor from RT to GND is given in

Equation 1.

where

• f

is the switching frequency in kHz

• R

is the resistor connected from RT to GND in kΩ (1)

When the oscillator is programmed using this method, the SYNC pin is configured as an input. The device may

be synchronized to a higher frequency than the free running frequency by applying a pulse train to the SYNC pin.

For best results, limit the frequency of the pulse train applied to SYNC to 20% more than the free running

frequency. The TPS40195 will synchronize to the falling edge of the pulse train applied to the SYNC pin.