Datasheet

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SLVS399A − JANUARY 2002 − REVISED MAY 2006
8
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electrical characteristics over recommended operating junction temperature range,
V
I(SW_IN)
= 3.3 V for TPS2140/50, V
I(SW_IN)
= 5 V for TPS2141/51, V
I(LDO_IN)
= 5 V, all outputs unloaded
(unless otherwise noted) (continued)
power switch
PARAMETER TEST CONDITIONS
†
MIN
TYP MAX UNIT
TPS2140, TPS2150
T
J
= 25°C, I = 500 mA,
V
I(SW_EN)
= 3.3 V or V
I(/SW_EN)
= 0 V
40 50
Switch on resistance
TPS2140, TPS2150
T
J
= 110°C, I = 500 mA,
V
I(SW_EN)
= 3.3 V or V
I(/SW_EN)
= 0 V
65
mΩ
Switch on resistance
(SW_IN to SW_OUT)
TPS2141, TPS2151
T
J
= 25°C, I = 500 mA,
V
I(SW_EN)
= 5 V or V
I(/SW_EN)
= 0 V
40 50
mΩ
TPS2141, TPS2151
T
J
= 110°C, I = 500 mA,
V
I(SW_EN)
= 5 V or V
I(/SW_EN)
= 0 V
65
Switch low-current-limit cutoff
threshold, V
COFF(SW_OUT)
Low current limit is disabled when V
O(SW_OUT)
is above this %V
I(SW_IN)
level
91% 93% 96%
Switch low-current-limit
cutin threshold, V
CIN(SW_OUT)
Low current limit is enabled V
O(SW_OUT)
is be-
low this
%V
I(SW_IN)
level
76% 79% 82%
Switch current limit
Low-current-limit mode:
Ramp-up current limit, IRCL
50 75 99
Switch current limit
Low-current-limit mode: Short-
SW_OUT is enabled into a
T
J
= 25°C
50 75 99
mA
Low-current-limit mode: Short-
circuit dc current limit, I
OS
SW_OUT is enabled into a
short to ground
T
J
= 110°C
47 75 99
mA
High-current-limit mode:
T
J
= 25°C
900 1300 1800
High-current-limit mode:
Overload dc current limit, I
OL
T
J
= 110°C
800 1300 1800
Switch forward leak-
age current I
LK_SW
Current into pin SW_OUT
V
O(SW_OUT)
= 0 V, V
I(SW_IN)
= 5.5 V,
V
I(SW_EN)
= 0 V or V
I(/SW_EN)
= 5 V
10
A
Switch reverse leak-
age current I
RLK_SW
Current into pin SW_OUT
V
O(SW_OUT)
= 5.5 V, V
I(SW_IN)
= 0 V,
V
I(SW_EN)
= 0 V or V
I(/SW_EN)
= 5 V
10
µA
Switch pulldown transistor current
V
I(SW_PLDN)
= 3.3 V 9 15
mA
Switch pulldown transistor current
V
I(PLDN_SW)
= 1 V 5
mA
†
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
timing parameters, power switch
PARAMETER TEST CONDITIONS
MIN
TYP MAX UNIT
t
on
Turnon time C
L
= 10 µF, No load
1
t
off
Turnoff time C
L
= 10 µF, SW_OUT is connected to SW_PLDN, No load
8
ms
t
r
Rise time C
L
= 10 µF, No load
0.5
ms
t
f
Fall time C
L
= 10 µF, SW_OUT is connected to SW_PLDN, No load
5
undervoltage lockout, SW_IN
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Switch UVLO rising threshold
TPS2140, TPS2150 2.7
Switch UVLO rising threshold
TPS2141, TPS2151
4.1
V
Switch UVLO falling threshold
TPS2140, TPS2150 2.3 2.45
V
Switch UVLO falling threshold
TPS2141, TPS2151 3.5 3.9
UVLO hysteresis
‡
250 mV
‡
Not tested in production.