Datasheet

TPS2052C, TPS2062C, TPS2062C-2
TPS2066C, TPS2066C-2, TPS2060C, TPS2064C
TPS2064C-2, TPS2002C, TPS2003C
SLVSAX6G –OCTOBER 2011–REVISED JANUARY 2013 www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
DEVICE INFORMATION
(1)(2)
PACKAGE DEVICES and MARKING
(3)
MAXIMUM
OUTPUT BASE PART
OPERATING ENABLE
SOIC-8 MSOP-8 (DGN) SON-10 SON-8
DISCHARGE NUMBER
CURRENT
(D) PowerPAD™ (DRC) (DRB)
0.5 High Y TPS2052C – PYNI – –
1 Low Y TPS2062C 2062C VRBQ – –
1 Low N TPS2062C-2 – – – PYVI
1 High Y TPS2066C 2066C VRDQ – –
1 High N TPS2066C-2 – PYUI – –
1.5 Low Y TPS2060C – VRAQ – –
1.5 High Y TPS2064C – VRCQ – –
1.5 High N TPS2064C-2 – PYTI – –
2 Low Y TPS2002C – – VREQ –
2 High Y TPS2003C – – VRFQ –
(1) For the most current packaging and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Package code for MSOP-8 is “DGN” and for SON is “DRC”.
(3) “–” indicates the device is not available in this package.
ABSOLUTE MAXIMUM RATINGS
(1)(2)
VALUE
UNIT
MIN MAX
Voltage range on IN, OUTx, ENx or ENx, FLTx
(3)
–0.3 6 V
Voltage range from IN to OUT –6 6 V
Maximum junction temperature, T
J
Internally Limited °C
Human Body Model 2 kV
ESD Charged Device Model 500 V
IEC 61000-4-2, Contact / Air
(4)
8 / 15 kV
(1) Absolute maximum ratings apply over recommended junction temperature range.
(2) All voltages are with respect to GND unless otherwise noted.
(3) See INPUT AND OUTPUT CAPACITANCE section.
(4) V
OUT
was surged on a PCB with input and output bypassing per Figure 1 (except input capacitor was 22 µF) with no device failure.
THERMAL INFORMATION
D DGN DRC DRB
THERMAL METRIC
(1)(2)
UNITS
8 PINS 8 PINS 10 PINS 8-PINS
θ
JA
Junction-to-ambient thermal resistance 129.9 57.2 45.4 50.8
θ
JCtop
Junction-to-case (top) thermal resistance 83.5 110.5 58 60.3
θ
JB
Junction-to-board thermal resistance 70.4 60.7 21.1 26.3
°C/W
ψ
JT
Junction-to-top characterization parameter 36.6 7.8 1.9 2.1
ψ
JB
Junction-to-board characterization parameter 66.9 24 21.3 26.5
θ
JCbot
Junction-to-case (bottom) thermal resistance n/a 14.3 9.1 9.8
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.
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Product Folder Links: TPS2052C TPS2062C TPS2062C-2 TPS2066C TPS2066C-2 TPS2060C TPS2064C
TPS2064C-2 TPS2002C TPS2003C