Datasheet

-1.2E-08
-1.0E-08
-8.0E-09
-6.0E-09
-4.0E-09
-2.0E-09
0.0E+00
0 1 2 3 4 5
Current (A)
V
5V_OUT
(V)
IVCC5V
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0.0 0.5 1.0 1. 5 2.0 2.5 3.0 3. 5 4.0 4.5 5.0 5.5
Bias Voltage (V)
Capacitance (pF)
TPD12S016
www.ti.com SLLSE96D –SEPTEMBER 2011–REVISED DECEMBER 2012
CAPACITANCE vs BIAS VOLTAGE LOAD SWITCH I
LEAKAGE_REVERSE
vs V
5V_OUT
Figure 16. Figure 17.
Eye Diagram Using EVM Without TPD12S016 for the TMDS Lines at 1080p, 340MHz Pixel Clock, 3.4Gbps
Figure 18.
Eye Diagram Using EVM with TPD12S016 for the TMDS Lines at 1080p, 340MHz Pixel Clock, 3.4Gbps
Figure 19.
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