Datasheet

TPA6211A1
SLOS367D –AUGUST 2003– REVISED JUNE 2011 www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
PACKAGED DEVICES
(1)
T
A
EVALUATION MODULES
SMALL OUTLINE MSOP PowerPAD™
(DRB) (DGN)
–40°C to 85°C TPA6211A1DRB TPA6211A1DGN TPA6211A1EVM
(1) The DGN and DRB are available taped and reeled. To order taped and reeled parts, add the suffix R
to the part number (TPA6211A1DGNR or TPA6211A1DRBR).
Terminal Functions
TERMINAL
I/O DESCRIPTION
NAME DRB, DGN
IN- 4 I Negative differential input
IN+ 3 I Positive differential input
V
DD
6 I Power supply
V
O+
5 O Positive BTL output
GND 7 I High-current ground
V
O-
8 O Negative BTL output
SHUTDOWN 1 I Shutdown terminal (active low logic)
BYPASS 2 Mid-supply voltage, adding a bypass capacitor improves PSRR
Connect to ground. Thermal pad must be soldered down in all applications to properly secure
Thermal Pad - -
device on the PCB.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted
(1)
UNIT
V
DD
Supply voltage –0.3 V to 6 V
V
I
Input voltage –0.3 V to V
DD
+ 0.3 V
Continuous total power dissipation See Dissipation Rating Table
T
A
Operating free-air temperature –40°C to 85°C
T
J
Junction temperature –40°C to 150°C
T
stg
Storage temperature –65°C to 150°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
PACKAGE DISSIPATION RATINGS
T
A
≤ 25°C DERATING T
A
= 70°C T
A
= 85°C
PACKAGE
POWER RATING FACTOR
(1)
POWER RATING POWER RATING
DGN 2.13 W 17.1 mW/°C 1.36 W 1.11 W
DRB 2.7 W 21.8 mW/°C 1.7 W 1.4 W
(1) Derating factor based on high-k board layout.
2 Copyright © 2003–2011, Texas Instruments Incorporated