Datasheet
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PGND
ROUT-
PV
DD
RIN+
RIN-
V
DD
LIN-
LIN+
PV
DD
LOUT-
1
ROUT+
SE/BTL
VOLUME
AGND
NC
BYPASS
FADE
SHUTDOWN
LOUT+
PGND
2
3
4
5
6
7
8
9
10
11
12
14
15
16
17
13
18
19
20
C
i
V
DD
V
DD
Right Positive
Differential Input Signal
Left Negative
Differential Input Signal
Right Negative
Differential Input Signal
Left Positive
Differential Input Signal
C
i
C
C
i
i
Power Supply
Power Supply
V
DD
100 kW
100 kW
C
330 F
O
m
C
330 F
O
m
0.47 Fm
0.47 Fm
0.47 Fm
0.47 Fm
0.47 Fm
0.47 Fm
0.47 Fm
C
10 F
S
m
C
0.47 F
(BYP)
m
In From DAC
or
Potentiometer
(DC Voltage)
System
Control
Right
Speaker
Left
Speaker
Headphones
1 kW
1 kW
SE/ BTL OPERATION
TPA6021A4
SLOS465 – JUNE 2005
APPLICATION INFORMATION (continued)
A. A 0.47-µF ceramic capacitor should be placed as close as possible to the IC. For filtering lower-frequency noise
signals, a larger electrolytic capacitor of 10 µF or greater should be placed near the audio power amplifier.
Figure 20. Typical TPA6021A4 Application Circuit Using Differential Inputs
The ability of the TPA6021A4 to easily switch between BTL and SE modes is one of its most important cost
saving features. This feature eliminates the requirement for an additional headphone amplifier in applications
where internal stereo speakers are driven in BTL mode but external headphone or speakers must be
accommodated. Internal to the TPA6021A4, two separate amplifiers drive OUT+ and OUT–. The SE/ BTL input
controls the operation of the follower amplifier that drives LOUT– and ROUT–. When SE/ BTL is held low, the
amplifier is on and the TPA6021A4 is in the BTL mode. When SE/ BTL is held high, the OUT– amplifiers are in a
high output impedance state, which configures the TPA6021A4 as an SE driver from LOUT+ and ROUT+. I
DD
is
reduced by approximately one-third in SE mode. Control of the SE/ BTL input can be from a logic-level CMOS
source or, more typically, from a resistor divider network as shown in Figure 21 . The trip level for the SE/ BTL
input can be found in the recommended operating conditions table.
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