Datasheet

TMS320F28335, TMS320F28334, TMS320F28332

TMS320F28235, TMS320F28234, TMS320F28232

SPRS439M –JUNE 2007–REVISED AUGUST 2012

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Table 3-10. Peripheral Frame 2 Registers

NAME ADDRESS RANGE SIZE (x16)

System Control Registers 0x00 7010 – 0x00 702F 32

SPI-A Registers 0x00 7040 – 0x00 704F 16

SCI-A Registers 0x00 7050 – 0x00 705F 16

External Interrupt Registers 0x00 7070 – 0x00 707F 16

ADC Registers 0x00 7100 – 0x00 711F 32

SCI-B Registers 0x00 7750 – 0x00 775F 16

SCI-C Registers 0x00 7770 – 0x00 777F 16

I2C-A Registers 0x00 7900 – 0x00 793F 64

Table 3-11. Peripheral Frame 3 Registers

NAME ADDRESS RANGE SIZE (x16)

McBSP-A Registers (DMA) 0x5000 – 0x503F 64

McBSP-B Registers (DMA) 0x5040 – 0x507F 64

ePWM1 + HRPWM1 (DMA)

(1)

0x5800 – 0x583F 64

ePWM2 + HRPWM2 (DMA) 0x5840 – 0x587F 64

ePWM3 + HRPWM3 (DMA) 0x5880 – 0x58BF 64

ePWM4 + HRPWM4 (DMA) 0x58C0 – 0x58FF 64

ePWM5 + HRPWM5 (DMA) 0x5900 – 0x593F 64

ePWM6 + HRPWM6 (DMA) 0x5940 – 0x597F 64

(1) The ePWM and HRPWM modules can be re-mapped to Peripheral Frame 3 where they can be accessed by the DMA module. To

achieve this, bit 0 (MAPEPWM) of MAPCNF register (address 0x702E) must be set to 1. This register is EALLOW protected. When this

bit is 0, the ePWM and HRPWM modules are mapped to Peripheral Frame 1.

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TMS320F28232