Datasheet

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

www.ti.com

SPRS174T –APRIL 2001–REVISED MAY 2012

The operation and timing of the external interface, can be controlled by the registers listed in Table 3-10.

Table 3-10. XINTF Configuration and Control Register Mappings

SIZE

NAME ADDRESS DESCRIPTION

(x16)

XTIMING0 0x00 0B20 2 XINTF Timing Register, Zone 0 can access as two 16-bit registers or one 32-bit register.

XTIMING1 0x00 0B22 2 XINTF Timing Register, Zone 1 can access as two 16-bit registers or one 32-bit register.

XTIMING2 0x00 0B24 2 XINTF Timing Register, Zone 2 can access as two 16-bit registers or one 32-bit register.

XTIMING6 0x00 0B2C 2 XINTF Timing Register, Zone 6 can access as two 16-bit registers or one 32-bit register.

XTIMING7 0x00 0B2E 2 XINTF Timing Register, Zone 7 can access as two 16-bit registers or one 32-bit register.

XINTCNF2 0x00 0B34 2 XINTF Configuration Register can access as two 16-bit registers or one 32-bit register.

XBANK 0x00 0B38 1 XINTF Bank Control Register

XREVISION 0x00 0B3A 1 XINTF Revision Register

3.5.1 Timing Registers

XINTF signal timing can be tuned to match specific external device requirements such as setup and hold

times to strobe signals for contention avoidance and maximizing bus efficiency. The XINTF timing

parameters can be configured individually for each zone based on the requirements of the memory or

peripheral accessed by that particular zone. This allows the programmer to maximize the efficiency of the

bus on a per-zone basis. All XINTF timing values are with respect to XTIMCLK, which is equal to or one-

half of the SYSCLKOUT rate, as shown in Figure 6-30.

For detailed information on the XINTF timing and configuration register bit fields, see the TMS320x281x

DSP External Interface (XINTF) Reference Guide (literature number SPRU067).

3.5.2 XREVISION Register

The XREVISION register contains a unique number to identify the particular version of XINTF used in the

product. For the 2812, this register will be configured as described in Table 3-11.

Table 3-11. XREVISION Register Bit Definitions

BIT(S) NAME TYPE RESET DESCRIPTION

Current XINTF Revision. For internal use/reference. Test purposes

15–0 REVISION R 0x0004

only. Subject to change.

Submit Documentation Feedback

Product Folder Link(s): TMS320F2810 TMS320F2811 TMS320F2812 TMS320C2810 TMS320C2811 TMS320C2812