Datasheet

TMS320F2809, TMS320F2808, TMS320F2806

TMS320F2802, TMS320F2801, TMS320C2802

TMS320C2801, TMS320F28016, TMS320F28015

www.ti.com

SPRS230N –OCTOBER 2003–REVISED MAY 2012

eQEP: The enhanced QEP peripheral uses a 32-bit position counter, supports low-speed

measurement using capture unit and high-speed measurement using a 32-bit unit

timer.

This peripheral has a watchdog timer to detect motor stall and input error detection

logic to identify simultaneous edge transition in QEP signals.

ADC: The ADC block is a 12-bit converter, single-ended, 16-channels. It contains two

sample-and-hold units for simultaneous sampling.

3.2.21 Serial Port Peripherals

The 280x devices support the following serial communication peripherals:

eCAN: This is the enhanced version of the CAN peripheral. It supports 32 mailboxes, time

stamping of messages, and is CAN 2.0B-compliant.

SPI: The SPI is a high-speed, synchronous serial I/O port that allows a serial bit stream of

programmed length (one to sixteen bits) to be shifted into and out of the device at a

programmable bit-transfer rate. Normally, the SPI is used for communications

between the DSP controller and external peripherals or another processor. Typical

applications include external I/O or peripheral expansion through devices such as

shift registers, display drivers, and ADCs. Multi-device communications are

supported by the master/slave operation of the SPI. On the 280x, the SPI contains a

16-level receive and transmit FIFO for reducing interrupt servicing overhead.

SCI: The serial communications interface is a two-wire asynchronous serial port,

commonly known as UART. On the 280x, the SCI contains a 16-level receive and

transmit FIFO for reducing interrupt servicing overhead.

I2C: The inter-integrated circuit (I2C) module provides an interface between a DSP and

other devices compliant with Philips Semiconductors Inter-IC bus (I2C-bus)

specification version 2.1 and connected by way of an I2C-bus. External components

attached to this 2-wire serial bus can transmit/receive up to 8-bit data to/from the

DSP through the I2C module. On the 280x, the I2C contains a 16-level receive and

transmit FIFO for reducing interrupt servicing overhead.

3.3 Register Map

The 280x devices contain three peripheral register spaces. The spaces are categorized as follows:

Peripheral These are peripherals that are mapped directly to the CPU memory bus.

Frame 0: See Table 3-8.

Peripheral These are peripherals that are mapped to the 32-bit peripheral bus.

Frame 1 See Table 3-9.

Peripheral These are peripherals that are mapped to the 16-bit peripheral bus.

Frame 2: See Table 3-10.

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TMS320C2801 TMS320F28016 TMS320F28015