Datasheet
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15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
GPIO22/EQEP1S/LINTXA
GPIO23/EQEP1I/LINRXA
V
DD
V
SS
XRS
TRST
ADCINA7
ADCINA6/COMP3A/AIO6
ADCINA4/COMP2A/AIO4
ADCINA3
ADCINA2/COMP1A/AIO2
ADCINA1
ADCINA0/V
REFHI
V
DDA
GPIO18/SPICLKA/LINTXA/XCLKOUT
GPIO17/SPISOMIA/TZ3
GPIO16/SPISIMOA/TZ2
GPIO12/ /SCITXDATZ1
GPIO7/EPWM4B/SCIRXDA
GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO
X2
X1
V
SS
V
DD
GPIO19/XCLKIN/ /LINRXA/ECAP1SPISTEA
GPIO38/TCK/XCLKIN
GPIO37/TDO
GPIO35/TDI
V
SSA
/V
REFLO
ADCINB1
ADCINB2/COMP1B/AIO10
ADCINB3
ADCINB4/COMP2B/AIO12
ADCINB6/COMP3B/AIO14
ADCINB7
GPIO31/CANTXA
GPIO30/CANRXA
GPIO29/SCITXDA/SCLA/TZ3
V
SS
V
DDIO
TEST2
GPIO28/SCIRXDA/SDAA/TZ2
GPIO36/TMS
GPIO5/EPWM3B/SPISIMOA/ECAP1
GPIO4/EPWM3A
GPIO3/EPWM2B/SPISOMIA/COMP2OUT
GPIO2/EPWM2A
GPIO1/EPWM1B/COMP1OUT
GPIO0/EPWM1A
V
DDIO
V
SS
V
DD
VREGENZ
GPIO34/COMP2OUT/COMP3OUT
GPIO20/EQEP1A/COMP1OUT
GPIO21/EQEP1B/COMP2OUT
TMS320F28030, TMS320F28031, TMS320F28032
TMS320F28033, TMS320F28034, TMS320F28035
www.ti.com
SPRS584J –APRIL 2009–REVISED OCTOBER 2013
A. This figure shows the top view of the 56-pin RSH package. Shading denotes that the terminals are actually on the
bottom side of the package. See Section 7, Thermal/Mechanical Data, for the 56-pin RSH mechanical drawing.
B. Pin 13: V
REFHI
and ADCINA0 share the same pin on the 56-pin RSH device and their use is mutually exclusive to one
another.
C. Pin 15: V
REFLO
is always connected to V
SSA
on the 56-pin RSH device.
Figure 2-1. 2803x 56-Pin RSH VQFN (Top View)
Copyright © 2009–2013, Texas Instruments Incorporated Introduction 11
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