Datasheet

Conversion 0 (A)
13 ADCClocks
Minimum
7 ADCCLKs
SOC0 (A/B)
ADCCLK
ADCRESULT 0
S/HWindowPulsetoCore
ADCCTL1.INTPULSEPOS
ADCSOCFLG 1.SOC0
ADCINTFLG .ADCINTx
SOC2 (A/B)
9 22 24 37
19
ADCCLKs
20
Result 0 (A) Latched
Conversion 0 (B)
13 ADCClocks
Minimum
7 ADCCLKs
ADCSOCFLG 1.SOC1
ADCSOCFLG 1.SOC2
ADCRESULT 1
Result 0 (B) Latched
Conversion 1 (A)
13 ADCClocks
ADCRESULT 2
50
EOC0 Pulse
EOC1 Pulse
EOC2 Pulse
1 ADCCLK
2 ADCCLKs
2 ADCCLKs
AnalogInputB
SOC0 Sample
BWindow
SOC2 Sample
BWindow
AnalogInput A
SOC0 Sample
A Window
SOC2 Sample
A Window
TMS320F28027, TMS320F28026, TMS320F28023, TMS320F28022
TMS320F28021, TMS320F28020, TMS320F280200
www.ti.com SPRS523J –NOVEMBER 2008–REVISED OCTOBER 2013
Figure 6-29. Timing Example for Simultaneous Mode / Late Interrupt Pulse
Copyright © 2008–2013, Texas Instruments Incorporated Electrical Specifications 117
Submit Documentation Feedback
Product Folder Links: TMS320F28027 TMS320F28026 TMS320F28023 TMS320F28022 TMS320F28021
TMS320F28020 TMS320F280200