Datasheet

0x00 0000
Block Start
Address
Data Space
Prog Space
M0 Vector − RAM (32 x 32)
(Enabled if VMAP = 0)
M1 SARAM (1K y 16)
0x00 0400
Peripheral Frame 0
0x00 0800
0x00 0D00
Peripheral Frame 1
(protected)
0x00 6000
Peripheral Frame 2
(protected)
0x00 7000
L0 SARAM (0-wait)
(4K y 16, Secure Zone, Dual-Mapped)
0x00 8000
L1 SARAM (0-wait)
(4K y 16, Secure Zone, Dual-Mapped)
0x00 9000
H0 SARAM (0-wait)
(8K y 16, Dual-Mapped)
0x00 A000
0x00 C000
OTP
(1K y 16, Secure Zone)
0x3D 7800
0x3D 7C00
FLASH
(128K y 16, Secure Zone)
0x3D 8000
0x3F 7FF8
128-bit Password
L0 SARAM (0-wait)
(4K y 16, Secure Zone, Dual-Mapped)
0x3F 8000
L1 SARAM (0-wait)
(4K y 16, Secure Zone, Dual-Mapped)
0x3F 9000
H0 SARAM (0-wait)
(8K y 16, Dual-Mapped)
0x3F A000
0x3F F000
Boot ROM (4K y 16)
Vectors (32 y 32)
(enabled if VMAP = 1, ENPIE = 0)
0x3F FFC0
Low 64K [0000 − FFFF]
(24x/240x equivalent data space)
High 64K [3F0000 − 3FFFFF]
(24x/240x equivalent program space)
PIE Vector − RAM
(256 x 16)
(Enabled if ENPIE = 1)
0x00 0E00
0x3F C000
Reserved
Reserved
Reserved
Reserved
Reserved
M0 SARAM (1K y 16)
0x00 0040
Reserved
TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801, TMS320C2802
TMS320C2801, TMS320F28016, TMS320F28015
www.ti.com SPRS230N –OCTOBER 2003–REVISED MAY 2012
3.1 Memory Maps
A. Memory blocks are not to scale.
B. Peripheral Frame 0, Peripheral Frame 1, and Peripheral Frame 2 memory maps are restricted to data memory only.
User program cannot access these memory maps in program space.
C. Protected means the order of Write followed by Read operations is preserved rather than the pipeline order.
D. Certain memory ranges are EALLOW protected against spurious writes after configuration.
Figure 3-2. F2809 Memory Map
Copyright © 2003–2012, Texas Instruments Incorporated Functional Overview 25
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Product Folder Link(s): TMS320F2809 TMS320F2808 TMS320F2806 TMS320F2802 TMS320F2801 TMS320C2802
TMS320C2801 TMS320F28016 TMS320F28015