Datasheet

3 External Interrupts
M0
SARAM 1K x 16
(0-wait)
16-bit Peripheral Bus
M1
SARAM 1K x 16
(0-wait)
SCI
(4L FIFO)
ePWM
SPI
(4L FIFO)
I C
2
(4L FIFO)
HRPWM
eCAP
32-Bit Peripheral Bus
Code
Security
Module
GPIO MUX
C28x
32-bit CPU
A7:0
B7:0
PIE
CPU Timer 0
CPU Timer 1
CPU Timer 2
TCK
TDI
TMS
TDO
TRST
OSC1,
OSC2,
Ext,
PLL,
LPM,
WD
XCLKIN
X2
XRS
32-bit Peripheral Bus
ECA Px
EPWMxA
EPWMSYNCI
SDAx
SPISTEx
SCLx
SPISIMOx
SPICLKx
COMP1OUT
SCIRXDx
GPIO
Mux
LPM Wakeup
AIO
MUX
ADC
PSWD
FLASH
8K/16K/32K x 16
Secure
OTP 1K x 16
Secure
OTP/Flash
Wrapper
Boot-ROM
8K x 16
(0-wait)
SARAM
1K/3K/4K x 16
(0-wait)
Secure
COMP
32-bit periph eral bus
COMP1A
COMP1B
COMP2A
COMP2B
COMP2OUT
X1
GPIO
MUX
VREG
From
COMP1OUT,
COMP2OUT
POR/
BOR
Memory Bus
Memory Bus
Memory Bus
TZx
SCITXDx
SPISOMIx
EPWMxB
EPWMSYNCO
TMS320F28027, TMS320F28026, TMS320F28023, TMS320F28022
TMS320F28021, TMS320F28020, TMS320F280200
www.ti.com SPRS523J –NOVEMBER 2008–REVISED OCTOBER 2013
1.4 Functional Block Diagram
Figure 1-1 shows the functional block diagram for the device.
A. Not all peripheral pins are available at the same time due to multiplexing.
Figure 1-1. Functional Block Diagram
1.5 Getting Started
This section gives a brief overview of the steps to take when first developing for a C28x device. For more
detail on each of these steps, see the following:
• Getting Started With TMS320C28x Digital Signal Controllers (literature number SPRAAM0).
• C2000 Getting Started Website (http://www.ti.com/c2000getstarted)
• TMS320F28x MCU Development and Experimenter's Kits (http://www.ti.com/f28xkits)
Copyright © 2008–2013, Texas Instruments Incorporated TMS320F2802x, TMS320F2802xx (Piccolo) MCUs 3
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