Datasheet

TLV700xx

SLVSA00D –SEPTEMBER 2009–REVISED NOVEMBER 2012

www.ti.com

(1) Publication IPC-7351 is recommended for alternate designs.

(2) For more information, refer to TI application notes SCBA017 and SLUA271 (Quad Flatpack No-Lead Logic Packages

and QFN/SON PCB Attachment, respectively) for specific thermal information, via requirements, and additional

recommendations for board layout. These documents are available at the Texas Instruments web site

(http://www.ti.com) by searching for the literature number.

(3) Laser-cutting apertures with trapedzoidal walls and also rounding corners will offer better paste release. Customers

should contact their board assembly site for stencil design recommendations. Refer to IPC-7525 for stencil design

considerations.

(4) Customers should contact their board fabrication site for minimum solder mask tolerances between signal pads.

Figure 22. Recommended Land Pattern for DSE Package