Datasheet

TLV5620C, TLV5620I
QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS110B – JANUARY 1995 – REVISED APRIL 1997
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
equivalent inputs and outputs
GND
V
ref
Input
V
DD
To DAC
Resistor
String
_
+
V
DD
DAC
Voltage Output
I
SINK
60 µA
Typical
84 kΩ
84 kΩ
× 1
× 2
Output
Range
Select
Input from
Decoded DAC
Register String
INPUT CIRCUIT OUTPUT CIRCUIT
GND
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage (V
DD
– GND) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital input voltage range GND – 0.3 V to V
DD
+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reference input voltage range, V
ID
GND – 0.3 V to V
DD
+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: TLV5620C 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TLV5620I –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–50°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage, V
DD
2.7 3.3 5.25 V
High-level input voltage, V
IH
0.8 V
DD
V
Low-level input voltage, V
IL
0.8 V
Reference voltage, V
ref
[A|B|C|D], x1 gain V
DD
–1.5 V
Load resistance, R
L
10 kΩ
Setup time, data input, t
su(DATA-CLK)
(see Figures 1 and 2) 50 ns
Valid time, data input valid after CLK↓, t
v(DATA-CLK)
(see Figures 1 and 2) 50 ns
Setup time, CLK eleventh falling edge to LOAD, t
su(CLK-LOAD)
(see Figure 1) 50 ns
Setup time, LOAD↑ to CLK↓, t
su(LOAD-CLK)
(see Figure 1) 50 ns
Pulse duration, LOAD, t
w(LOAD)
(see Figure 1) 250 ns
Pulse duration, LDAC, t
w(LDAC)
(see Figure 2) 250 ns
Setup time, LOAD↑ to LDAC↓,t
su(LOAD-LDAC)
(see Figure 2) 0 ns
CLK frequency 1 MHz
O
p
erating free air tem
p
erature T
A
TLV5620C 0 70
°
C
Operating
free
-
air
temperat
u
re
,
T
A
TLV5620I –40 85
°C