Datasheet
TLV320AIC33
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........................................................................................................................................... SLAS480B – JANUARY 2006 – REVISED DECEMBER 2008
Page 0 / Register 12: Audio Codec Digital Filter Control Register (continued)
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D3 R/W 0 Left DAC Digital Effects Filter Control
0: Left DAC digital effects filter disabled (bypassed)
1: Left DAC digital effects filter enabled
D2 R/W 0 Left DAC De-emphasis Filter Control
0: Left DAC de-emphasis filter disabled (bypassed)
1: Left DAC de-emphasis filter enabled
D1 R/W 0 Right DAC Digital Effects Filter Control
0: Right DAC digital effects filter disabled (bypassed)
1: Right DAC digital effects filter enabled
D0 R/W 0 Right DAC De-emphasis Filter Control
0: Right DAC de-emphasis filter disabled (bypassed)
1: Right DAC de-emphasis filter enabled
Page 0 / Register 13: Headset / Button Press Detection Register A
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 Headset Detection Control
0: Headset detection disabled
1: Headset detection enabled
D6-D5 R 00 Headset Type Detection Results
00: No headset detected
01: Stereo headset detected
10: Cellular headset detected
11: Stereo + cellular headset detected
D4-D2 R/W 000 Headset Glitch Suppression Debounce Control for Jack Detection
000: Debounce = 16msec( sampled with 2ms clock)
001: Debounce = 32msec( sampled with 4ms clock)
010: Debounce = 64msec( sampled with 8ms clock)
011: Debounce = 128msec( sampled with 16ms clock)
100: Debounce = 256msec( sampled with 32ms clock)
101: Debounce = 512msec( sampled with 64ms clock)
110: Reserved, do not write this bit sequence to these register bits.
111: Reserved, do not write this bit sequence to these register bits.
D1-D0 R/W 00 Headset Glitch Suppression Debounce Control for Button Press
00: Debounce = 0msec
01: Debounce = 8msec(sampled with 1ms clock)
10: Debounce = 16msec(sampled with 2ms clock)
11: Debounce = 32msec(sampled with 4ms clock)
Page 0 / Register 14: Headset / Button Press Detection Register B
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 Driver Capacitive Coupling
0: Programs high-power outputs for capless driver configuration
1: Programs high-power outputs for ac-coupled driver configuration
D6
(1)
R/W 0 Stereo Output Driver Configuration A
Note: do not set bits D6 and D3 both high at the same time.
0: A stereo fully-differential output configuration is not being used
1: A stereo fully-differential output configuration is being used
D5 R 0 Button Press Detection Flag
This register is a sticky bit, and will stay set to 1 after a button press has been detected, until the
register is read. Upon reading this register, the bit is reset to zero.
0: A button press has not been detected
1: A button press has been detected
D4 R 0 Headset Detection Flag
0: A headset has not been detected
1: A headset has been detected
(1) Do not set D6 and D3 to 1 simultaneously
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