Datasheet

 
     
   
SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004
39
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APPLICATION INFORMATION
general power dissipation considerations
For a given θ
JA
, the maximum power dissipation is shown in Figure 63 and is calculated by the following formula:
P
D
+
ǒ
T
MAX
–T
A
q
JA
Ǔ
Where:
P
D
= Maximum power dissipation of TLV277x IC (watts)
T
MAX
= Absolute maximum junction temperature (150°C)
T
A
= Free-ambient air temperature (°C)
θ
JA
= θ
JC
+ θ
CA
θ
JC
= Thermal coefficient from junction to case
θ
CA
= Thermal coefficient from case to ambient air (°C/W)
1
0.75
0.5
0
−55−40 −25 −10 5
Maximum Power Dissipation − W
1.25
1.5
MAXIMUM POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
1.75
20 35 50
0.25
T
A
− Free-Air Temperature − °C
2
65 80 95 110 125
MSOP Package
Low-K Test PCB
θ
JA
= 260°C/W
T
J
= 150°C
PDIP Package
Low-K Test PCB
θ
JA
= 104°C/W
SOIC Package
Low-K Test PCB
θ
JA
= 176°C/W
SOT-23 Package
Low-K Test PCB
θ
JA
= 324°C/W
NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.
Figure 63. Maximum Power Dissipation vs Free-Air Temperature