Datasheet

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SLOS351D − MARCH 2001 − REVISED FEBRUARY 2004
13
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APPLICATION INFORMATION
offset voltage
The output offset voltage, (V
OO
) is the sum of the input offset voltage (V
IO
) and both input bias currents (I
IB
) times
the corresponding gains. The following schematic and formula can be used to calculate the output offset
voltage:
V
OO
+ V
IO
ǒ
1 ) ǒ
R
F
R
G
Ǔ
Ǔ
" I
IB)
R
S
ǒ
1 ) ǒ
R
F
R
G
Ǔ
Ǔ
" I
IB–
R
F
+
−
V
I
+
R
G
R
S
R
F
I
IB−
V
O
I
IB+
Figure 26. Output Offset Voltage Model
general configurations
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often
required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier
(see Figure 27).
V
I
V
O
C1
+
−
R
G
R
F
R1
f
–3dB
+
1
2pR1C1
V
O
V
I
+ ǒ1 )
R
F
R
G
Ǔ
ǒ
1
1 ) sR1C1
Ǔ
V
DD
/2
Figure 27. Single-Pole Low-Pass Filter
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this
task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth.
Failure to do this can result in phase shift of the amplifier.
V
I
C2
R2R1
C1
R
F
R
G
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
(
=
1
Q
2 −
)
R
G
R
F
_
+
f
–3dB
+
1
2pRC
V
DD
/2
Figure 28. 2-Pole Low-Pass Sallen-Key Filter