Datasheet

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TLC5510, TLC5510A

8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS

SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

features

Analog Input Range

– TLC5510 ...2 V Full Scale

– TLC5510A ...4 V Full Scale

8-Bit Resolution

Integral Linearity Error

±0.75 LSB Max (25°C)

±1 LSB Max (–20°C to 75°C)

Differential Linearity Error

±0.5 LSB Max (25°C)

±0.75 LSB Max (–20°C to 75°C)

Maximum Conversion Rate

20 Mega-Samples per Second

(MSPS) Max

5-V Single-Supply Operation

Low Power Consumption

TLC5510 . . . 127.5 mW Typ

TLC5510A . . . 150 mW Typ

(includes reference resistor dissipation)

TLC5510 is Interchangeable With Sony

CXD1175

applications

Digital TV

Medical Imaging

Video Conferencing

High-Speed Data Conversion

QAM Demodulators

description

The TLC5510 and TLC5510A are CMOS, 8-bit, 20

MSPS analog-to-digital converters (ADCs) that

utilize a semiflash architecture. The TLC5510 and

TLC5510A operate with a single 5-V supply and

typically consume only 130 mW of power.

Included is an internal sample-and-hold circuit,

parallel outputs with high-impedance mode, and

internal reference resistors.

The semiflash architecture reduces power

consumption and die size compared to flash

converters. By implementing the conversion in a

2-step process, the number of comparators is

significantly reduced. The latency of the data

output valid is 2.5 clocks.

The TLC5510 uses the three internal reference

resistors to create a standard, 2-V, full-scale

conversion range using V

DDA

. Only external jumpers are required to implement this option and eliminates the

need for external reference resistors. The TLC5510A uses only the center internal resistor section with an

externally applied 4-V reference such that a 4-V input signal can be used. Differential linearity is 0.5 LSB at 25°C

and a maximum of 0.75 LSB over the full operating temperature range. Typical dynamic specifications include

a differential gain of 1% and differential phase of 0.7 degrees.

The TLC5510 and TLC5510A are characterized for operation from –20°C to 75°C.

AVAILABLE OPTIONS

PACKAGE

MAXIMUM FULL SCALE

TSSOP (PW)

SOP (NS)

(TAPE AND REEL ONLY)

MAXIMUM

FULL

SCALE

INPUT VOLTAGE

20°Cto75°C

TLC5510IPW TLC5510INSLE 2 V

–

20°C

75°C

– TLC5510AINSLE 4 V

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

DGND

D1(LSB)

D8(MSB)

DDD

CLK

DGND

REFB

REFBS

AGND

ANALOG IN

DDA

REFT

REFTS

DDA

DDD

PW OR NS PACKAGE

†

(TOP VIEW)

†

Available in tape and reel only and ordered

as the shown in the Available Options table

below.

Summary of content (15 pages)

PAGE 1
TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 D D features D D D D D Analog Input Range – TLC5510 . . . 2 V Full Scale – TLC5510A . . . 4 V Full Scale 8-Bit Resolution Integral Linearity Error ± 0.75 LSB Max (25°C) ± 1 LSB Max (– 20°C to 75°C) Differential Linearity Error ± 0.5 LSB Max (25°C) ± 0.
PAGE 2
TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 functional block diagram Resistor Reference Divider OE REFB 270 Ω NOM Lower Sampling Comparators (4-Bit) REFT REFBS Lower Encoder (4-Bit) D1(LSB) D2 Lower Data Latch 80 Ω NOM D3 AGND D4 Lower Sampling Comparators (4-Bit) AGND Lower Encoder (4-Bit) VDDA D5 320 Ω NOM REFTS ANALOG IN CLK D6 Upper Data Latch Upper Sampling Comparators (4-Bit) D7 Upper Encoder (4-Bit) D8(MSB) Clock
PAGE 3
TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 Terminal Functions TERMINAL NAME AGND NO. I/O 20, 21 DESCRIPTION Analog ground ANALOG IN 19 I Analog input CLK 12 I Clock input DGND 2, 24 D1 – D8 3 – 10 O Digital data out. D1 = LSB, D8 = MSB 1 I Output enable. When OE = low, data is enabled. When OE = high, D1 – D8 is in high-impedance state.
PAGE 4
TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 electrical characteristics at VDD = 5 V, VREFT = 2.5 V, VREFB = 0.
PAGE 5
TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 operating characteristics at VDD = 5 V, VREFT = 2.5 V, VREFB = 0.5 V, f(CLK) = 20 MHz, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS TLC5510 MIN TYP VI(ANLG) = 0.5 V – 2.
PAGE 6
TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 PRINCIPLES OF OPERATION functional description The TLC5510 and TLC5510A are semiflash ADCs featuring two lower comparator blocks of four bits each. As shown in Figure 2, input voltage VI(1) is sampled with the falling edge of CLK1 to the upper comparators block and the lower comparators block(A), S(1).
PAGE 7
TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 PRINCIPLES OF OPERATION internal referencing TLC5510 The three internal resistors shown with VDDA can generate a 2-V reference voltage. These resistors are brought out on VDDA, REFTS, REFT, REFB, REFBS, and AGND. To use the internally generated reference voltage, terminal connections should be made as shown in Figure 3.
PAGE 8
TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 PRINCIPLES OF OPERATION functional operation The output code change with input voltage is shown in Table 1. Table 1.
PAGE 9
TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 APPLICATION INFORMATION DVDD 5V C12 TLC5510 AVDD 5V 13 VREF ADJ FB3 14 C8 FB2 R5 FB7 Video Input J1 C1 16 17 18 C11 C6 FB1 R4 VDDA VDDD VDDA D8 (MSB) 12 Clock 11 10 C11 REFTS D7 REFT D6 VDDA D5 ANALOG IN D4 AGND D3 AGND D2 9 8 C9 R3 D1 CLK C7 JP1 JP2 C3 TP1 Q1 15 VDDD R2 19 R1 C5 C2 20 D3 21 C4 –5V D2 JP3 JP4 22 TP3 C10 23 24 REFBS D1 (LSB)
PAGE 10
TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 APPLICATION INFORMATION DVDD 5V C4 TLC5510A AVDD 5V 13 VREF ADJ FB3 14 C8 FB2 R5 15 J1 C1 16 C3 TP1 Q1 17 C11 R4 VDDA VDDD VDDA D8 (MSB) 12 Clock 11 10 C11 REFTS D7 REFT D6 VDDA D5 ANALOG IN D4 AGND D3 AGND D2 9 8 C9 R3 D1 CLK C7 FB7 Video Input VDDD 18 FB1 C6 R2 19 R1 C5 C2 20 21 –5V 22 23 24 REFBS D1 (LSB) REFB DGND DGND OE 7 6 5 4 3 2 1 N
PAGE 11
TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 APPLICATION INFORMATION AVDD 5V 4.7 µF + 1 kΩ 0.1 µF 10 kΩ POT CLOCK 1 kΩ 4.7 µF TLC5510 THS3001 49.9 Ω AVSS – 5V 4.7 µF 49.9 Ω + _ CLOCK ANALOG IN 100 pF 681 Ω 0.1 µF 681 Ω + FB1† 4.7 µF + FB3 + 4.7 µF 4.7 µF + 0.1 µF + 0.1 µF + 4.7 µF VDDA VDDA VDDA 0.1 µF OE D1 D2 D3 D4 D5 D6 D7 D8 DVDD 5V 4.7 µF REFTS 0.1 µF VDDD VDDD REFT 4.7 µF + To Processor 0.1 µF 0.
PAGE 12
TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 APPLICATION INFORMATION AV DD +5V 0.1µF + 6.8µF CLOCK 698Ω 0.1µF TLC5510A 50Ω 49.9Ω OPA690 59Ω 698Ω OE CLOCK ANALOG IN 100pF D1 D2 D3 D4 D5 D6 D7 D8 402Ω 402Ω 0.1µF FB1† + FB3 + 4.7µF 0.1µF + 4.7µF 0.1µF + VDDA VDDA VDDA 4.7µF 4.7µF DVDD +5V 0.1µF 4.7µF VREF 4V 4.7µF REFTS REFT REFBS REFB VDDD VDDD 0.1µF DGND DGND AGND AGND † FB — Ferrite Bead Figure 8.
PAGE 13
TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 MECHANICAL DATA PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D.
PAGE 14
TLC5510, TLC5510A 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003 MECHANICAL DATA NS (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PIN SHOWN PINS ** 14 16 20 24 A MAX 10,50 10,50 12,90 15,30 A MIN 9,90 9,90 12,30 14,70 DIM 0,51 0,35 1,27 14 0,25 M 8 0,15 NOM 5,60 5,00 8,20 7,40 Gage Plane 1 7 0,25 0°– 10° A 1,05 0,55 Seating Plane 2,00 MAX 0,05 MIN 0,10 4040062 / B 2/95 NOTES: A. All linear dimensions are in millimeters. B.
PAGE 15
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