Datasheet

 
  
 
SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
46
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts, the model generation software used
with Microsim PSpice. The Boyle macromodel (see Note 5) and subcircuit in Figure 59 were generated using
the TLC227x typical electrical and operating characteristics at T
A
= 25°C. Using this information, output
simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
D Maximum positive output voltage swing
D Maximum negative output voltage swing
D Slew rate
D Quiescent power dissipation
D Input bias current
D Open-loop voltage amplification
D Unity gain frequency
D Common-mode rejection ratio
D Phase margin
D DC output resistance
D AC output resistance
D Short-circuit output current limit
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal
of Solid-State Circuits, SC-9, 353 (1974).
OUT
+
+
+
+
+
+
+
+
+
.SUBCKT TLC227x 1 2 3 4 5
C1 11 1214E−12
C2 6 760.00E−12
DC 5 53DX
DE 54 5DX
DLP 90 91DX
DLN 92 90DX
DP 4 3DX
EGND 99 0POLY (2) (3,0) (4,) 0 .5 .5
FB 99 0POLY (5) VB VC VE VLP VLN 0
+ 984.9E3 −1E6 1E6 1E6 −1E6
GA 6 011 12 377.0E−6
GCM 0 6 10 99 134E−9
ISS 3 10DC 216.OE−6
HLIM 90 0VLIM 1K
J1 11 210 JX
J2 12 110 JX
R2 6 9100.OE3
RD1 60 112.653E3
RD2 60 122.653E3
R01 8 550
R02 7 9950
RP 3 44.310E3
RSS 10 99925.9E3
VAD 60 4−.5
VB 9 0DC 0
VC 3 53 DC .78
VE 54 4DC .78
VLIM 7 8DC 0
VLP 91 0DC 1.9
VLN 0 92DC 9.4
.MODEL DX D (IS=800.0E−18)
.MODEL JX PJF (IS=1.500E−12BETA=1.316E-3
+ VTO=−.270)
.ENDS
V
CC+
RP
IN −
2
IN+
1
V
CC
VAD
RD1
11
J1 J2
10
RSS ISS
3
12
RD2
60
VE
54
DE
DP
VC
DC
4
C1
53
R2
6
9
EGND
VB
FB
C2
GCM
GA
VLIM
8
5
RO1
RO2
HLIM
90
DIP
91
DIN
92
VINVIP
99
7
Figure 59. Boyle Macromodel and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
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