Datasheet

TL16C554A, TL16C554AI
ASYNCHRONOUS-COMMUNICATIONS ELEMENT


SLLS509E − AUGUST 2001 − REVISED JUNE 2010
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Clock
(XTAL1)
f
clock
= 16 MHz MAX
t
w2
t
w1
0.8 V
2 V
t
w3
RESET
2 V2 V
0.8 V
0.8 V
(a) CLOCK INPUT VOLTAGE WAVEFORM
(b) RESET VOLTAGE WAVEFORM
Figure 1. Clock Input and RESET Voltage Waveforms
82 pF
(see Note A)
680 Ω
2.54 V
Device Under Test
TL16C554
NOTE A: This includes scope and jig capacitance.
Figure 2. Output Load Circuit
9-Pin D Connector
Serial
Channel 1
Buffers
Serial
Channel 2
Buffers
Serial
Channel 3
Buffers
Serial
Channel 4
Buffers
9-Pin D Connector
9-Pin D Connector
9-Pin D Connector
Data Bus
Address Bus
Control Bus
Quadruple
ACE
TL16C554A
Figure 3. Basic Test Configuration