Datasheet

+V
S
External
Input/Output
Pin
Internal
Circuitry
75 W
S-VideoY'Out
CVBS
R
SOC/DAC/Encoder
S-Video Y’
R
S-Video C
R
Y'/G'
R
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
SD1OUT
SD2OUT
SD3OUT
DisableSD
GND
DisableSF
SF1OUT
SF2OUT
SF3OUT
BypassSF
SD1IN
SD2IN
SD3IN
NC
V
S+
NC
SF1IN
SF2IN
SF3IN
BypassSD
THS7360
Bypass
SDLPF
Bypass
SFLPF
P' /B'
B
R
CVBS
P' /R'
R
R
75 W
75 W
S-VideoC'Out
75 W
75 W
75 W
Y'/G'Out
75 W
P' /B'Out
B
75 W
75 W
P' /R'Out
R
75 W
75 W
75 W
+2.7Vto
+5V
DisableSF
DisableSD
THS7360
www.ti.com
SLOS674 JUNE 2010
INPUT OVERVOLTAGE PROTECTION These diodes provide moderate protection to input
overdrive voltages above and below the supplies as
The THS7360 is built using a very high-speed,
well. The protection diodes can typically support
complementary, bipolar CMOS process. The internal
30 mA of continuous current when overdriven.
junction breakdown voltages are relatively low for
these very small geometry devices. These
TYPICAL CONFIGURATION AND VIDEO
breakdowns are reflected in the Absolute Maximum
TERMINOLOGY
Ratings table. All input and output device pins are
protected with internal ESD protection diodes to the
A typical application circuit using the THS7360 as a
power supplies, as shown in Figure 42.
video buffer is shown in Figure 43. It shows a DAC or
encoder driving the input channels of the THS7360.
One channel is a CVBS connection while two other
channels are for the S-Video Y’/C’ signals of an SD
video system. These signals can be NTSC, PAL, or
SECAM signals. The other three channels are the
component video Y’/P’
B
/P’
R
(sometimes labeled
Y’U’V’ or incorrectly labeled Y’/C’
B
/C’
R
) signals. These
signals are typically 480i, 576i, 480p, 576p, 720p,
1080i, or up to 1080p60 signals. Because the filters
can be bypassed, other formats such as R'G'B' video
up to QXGA or UWXGA can also be supported with
Figure 42. Internal ESD Protection
the THS7360.
(1) SF indicates selectable filter.
Figure 43. Typical Six-Channel System Inputs from DC-Coupled Encoder/DAC with DC-Coupled Line
Driving
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