Datasheet

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DIE
Side View (a)
DIE
End View (b)
Bottom View (c)
0.144
0.0195
0.144
0.010
vias
Pin 1
Top View
0.012
0.030
0.0705
0.015
0.0095
0.049
0.032
0.0245
PowerPAD PCB LAYOUT CONSIDERATIONS
THS4303
SLOS421B – NOVEMBER 2003 – REVISED JANUARY 2005
During the surface-mount solder operation (when the area. They help dissipate the heat generated by
leads are being soldered), the thermal pad can also the IC. These additional vias may be larger than
be soldered to a copper area underneath the pack- the 13-mil diameter vias directly under the ther-
age. Through the use of thermal paths within this mal pad. They can be larger because they are
copper area, heat can be conducted away from the not in the thermal pad area to be soldered, so
package into either a ground plane or other heat that wicking is not a problem.
dissipating device.
4. Connect all holes to the internal ground plane.
The PowerPAD package represents a breakthrough 5. When connecting these holes to the ground
in combining the small area and ease of assembly of plane, do not use the typical web or spoke via
surface mount with the heretofore awkward mechan- connection methodology. Web connections have
ical methods of heatsinking. a high thermal resistance connection that is
useful for slowing the heat transfer during
soldering operations. This resistance makes the
soldering of vias that have plane connections
easier. In this application, however, low thermal
resistance is desired for the most efficient heat
transfer. Therefore, the holes under the IC
PowerPAD package should make their connec-
tion to the internal ground plane, with a complete
connection around the entire circumference of the
Figure 48. Views of Thermally Enhanced Package
plated-through hole.
6. The top-side solder mask should leave the ter-
Although there are many ways to properly heatsink
minals of the package and the thermal pad area
the PowerPAD package, the following steps illustrate
with its five holes exposed. The bottom-side
the recommended approach.
solder mask should cover the five holes of the
thermal pad area. This prevents solder from
being pulled away from the thermal pad area
during the reflow process.
7. Apply solder paste to the exposed thermal pad
area and all of the IC terminals.
8. With these preparatory steps in place, the IC is
simply placed in position and run through the
solder reflow operation as any standard sur-
face-mount component. This results in a part that
is properly installed.
The next consideration is the package constraints.
The two sources of heat within an amplifier are
quiescent power and output power. The designer
should never forget about the quiescent heat gener-
ated within the device, especially multi-amplifier de-
vices. Because these devices have linear output
stages (Class AB), most of the heat dissipation is at
low output voltages with high output currents.
Figure 49. PowerPAD PCB Etch and Via Pattern
The other key factor when dealing with power dissi-
pation is how the devices are mounted on the PCB.
The PowerPAD devices are extremely useful for heat
dissipation. But, the device should always be
soldered to a copper plane to fully use the heat
1. Prepare the PCB with a top side etch pattern as
dissipation properties of the PowerPAD. The SOIC
shown in Figure 49 . There should be etch for the
package, on the other hand, is highly dependent on
leads as well as etch for the thermal pad.
how it is mounted on the PCB. As more trace and
2. Place five holes in the area of the thermal pad.
copper area is placed around the device, Θ
JA
de-
They holes should be 13 mils in diameter. Keep
creases and the heat dissipation capability increases.
them small so that solder wicking through the
For a single package, the sum of the RMS output
holes is not a problem during reflow.
currents and voltages should be used to choose the
proper package.
3. Additional vias may be placed anywhere along
the thermal plane outside of the thermal pad
19