Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp Voltage feedback SOIC 8

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   

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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D C-Stable Amplifiers Drive Any Capacitive

Load

D High Speed

− 165 MHz Bandwidth (−3 dB); C

= 0 pF

− 100 MHz Bandwidth (−3 dB); C

= 100 pF

− 35 MHz Bandwidth (−3 dB); C

= 1000 pF

− 400 V/µs Slew Rate

D Unity Gain Stable

D High Output Drive, I

= 100 mA (typ)

D Very Low Distortion

− THD = −75 dBc (f = 1 MHz, R

= 150 Ω)

− THD = −89 dBc (f = 1 MHz, R

= 1 kΩ)

D Wide Range of Power Supplies

− V

= ±5 V to ±15 V

D Available in Standard SOIC or MSOP

PowerPAD Package

D Evaluation Module Available

description

The THS4041 and THS4042 are single/dual,

high-speed voltage feedback amplifiers capable

of driving any capacitive load. This makes them

ideal for a wide range of applications including

driving video lines or buffering ADCs. The devices

feature high 165-MHz bandwidth and 400-V/µsec

slew rate. The THS4041/2 are stable at all gains

for both inverting and noninverting configurations.

For video applications, the THS4041/2 offer

excellent video performance with 0.01% differen-

tial gain error and 0.01° differential phase error.

These amplifiers can drive up to 100 mA into a

20-Ω load and operate off power supplies ranging

from ±5V to ±15V.

RELATED DEVICES

DEVICE DESCRIPTION

THS4011/2 290-MHz Low Distortion High-Speed Amplifier

THS4031/2 100-MHz Low Noise High-Speed Amplifier

THS4081/2 175-MHz Low Power High-Speed Amplifiers

PowerPAD is a trademark of Texas Insruments Incorporated.

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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Cross Section View Showing

PowerPAD Option (DGN)

OUTPUT AMPLITUDE

FREQUENCY

f − Frequency − Hz

1G10M100k 1M

Output Amplitude − dB

100M

= ±15 V

Gain = 1

= 200 Ω

= 150 Ω

O(PP)=62

−2

−10

−6

−8

−4

= 1000 pF

= 0.1 µF

= 0 pF

= 100 pF

NULL

IN−

IN+

−

NULL

OUT

THS4041

D AND DGN PACKAGE

(TOP VIEW)

NC − No internal connection

1OUT

1IN−

1IN+

−

2OUT

2IN−

2IN+

THS4042

D AND DGN PACKAGE

(TOP VIEW)

CAUTION: The THS4041 and THS4042 provide ESD protection circuitry. However, permanent damage can still occur if this device

is subjected to high-energy electrostatic discharges. Proper ESD precautions are recommended to avoid any performance

degradation or loss of functionality.

Summary of content (34 pages)

PAGE 1
SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 D C-Stable Amplifiers Drive Any Capacitive D D D D D D D THS4041 D AND DGN PACKAGE (TOP VIEW) Load High Speed − 165 MHz Bandwidth (−3 dB); CL = 0 pF − 100 MHz Bandwidth (−3 dB); CL = 100 pF − 35 MHz Bandwidth (−3 dB); CL = 1000 pF − 400 V/µs Slew Rate Unity Gain Stable High Output Drive, IO = 100 mA (typ) Very Low Distortion − THD = −75 dBc (f = 1 MHz, RL = 150 Ω) − THD = −89 dBc (f = 1 MHz, RL = 1 kΩ) Wi
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 AVAILABLE OPTIONS PACKAGED DEVICES TA NUMBER OF CHANNELS PLASTIC SMALL OUTLINE† (D) PLASTIC MSOP† (DGN) MSOP SYMBOL EVALUATION MODULE 1 THS4041CD THS4041CDGN ACO THS4041EVM 2 THS4042CD THS4042CDGN ACC THS4042EVM 1 THS4041D THS4041IDGN ACP — 0°C to 70°C −40°C to 85°C 2 THS4042ID THS4042IDGN ACD † The D and DGN packages are available taped and reeled. Add an R suffix to the device type (i.
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 DISSIPATION RATING TABLE PACKAGE θJA (°C/W) θJC (°C/W) 25°C TA = 25 C POWER RATING D 167† 38.3 740 mW DGN‡ 58.4 4.7 2.14 W † This data was taken using the JEDEC standard Low-K test PCB. For the JEDEC proposed High-K test PCB, the θJA is 95°C/W with a power rating at TA = 25°C of 1.32 W. ‡ This data was taken using 2 oz. trace and copper pad that is soldered directly to a 3 in. × 3 in. PC.
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 electrical characteristics at TA = 25°C, VCC = ±15 V, RL = 150 Ω (unless otherwise noted) (continued) noise/distortion performance TEST CONDITIONS† PARAMETER THD Vn In Total harmonic distortion Input voltage noise Input current noise Differential gain error VO(pp) = 2 V, f = 1 MHz, Gain = 2 MIN VCC = ±15 V VCC = ±5 V TYP RL = 150 Ω −75 RL = 1 kΩ −89 RL = 150 Ω −75 RL = 1 kΩ −86 MAX UNIT dB
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 electrical characteristics at TA = 25°C, VCC = ±15 V, RL = 150 Ω (unless otherwise noted) (continued) output characteristics TEST CONDITIONS† PARAMETER VO IO Output voltage swing Output current‡ VCC = ±15 V VCC = ±5 V VCC = ±15 V VCC = ±5 V VCC = ±15 V MIN TYP RL = 250 Ω ±11.5 ±13 RL = 150 Ω ±3.2 ±3.5 RL = 1 kΩ ±13 ±13.6 ±3.5 ±3.
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 TYPICAL CHARACTERISTICS 2 0 VCC = ±15 V and ±5 V −60 60 −90 40 Phase −120 20 Output Amplitude − dB Gain RL = 1 kΩ Phase − Degrees Open Loop Gain − dB 0.
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 TYPICAL CHARACTERISTICS OUTPUT AMPLITUDE vs FREQUENCY OUTPUT AMPLITUDE vs FREQUENCY 16 7 14 6 RL = 150 Ω 4 3 1 0 100k VCC = ±15 V Gain = 2 RF = 1.3 kΩ VO = 0.4 Vrms 8 CL = 10 pF 6 4 2 0 −2 1M 10M f − Frequency − Hz VCC = ±15 V Gain = 2 −4 100k 100M 16 1 14 0 RL = 150 Ω −2 −3 VCC = ±5 V Gain = 2 RF = 1.3 kΩ VO = 0.
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 TYPICAL CHARACTERISTICS 1 8 RL = 1 kΩ RL = 150 Ω −2 −3 VCC = ±5 V Gain = −1 RF = 2 kΩ VO = 0.
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 TYPICAL CHARACTERISTICS DISTORTION vs OUTPUT VOLTAGE DISTORTION vs FREQUENCY −40 −50 −40 VCC = ±15 V Gain = 5 RL = 150 Ω f = 1 MHz −50 Distortion (dB) −60 2nd Harmonic −70 −80 2nd Harmonic −60 VCC = ±15 V Gain = 5 RL = 1 kΩ f = 1 MHz −60 Distortion (dB) VCC = ±5 V Gain = 2 RL = 1 kΩ VO(pp) = 2 V −50 Distortion − dB DISTORTION vs OUTPUT VOLTAGE 3rd Harmonic −70 2nd Harmonic −70 −80 3rd Harmoni
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 TYPICAL CHARACTERISTICS CROSSTALK vs FREQUENCY 90 −40 60 50 40 30 −60 −70 20 −90 100k 100M 1M 10M f − Frequency − Hz 300 RL = 150 Ω VCC = ±15 V VO(PP) = 20 V 0.0 260 350 VCC = ±5 V VO(PP) = 5 V VCC = ±15 V 0.01% 240 220 Gain = −1 RF = 360 Ω 200 180 160 VCC = ±15 V & ±5 V 0.1% 140 250 120 200 −40 100 −20 0 20 40 60 80 TA − Free-Air Temperature − °C 1 100 2.40 2.
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 TYPICAL CHARACTERISTICS SUPPLY CURRENT vs SUPPLY VOLTAGE OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 15 1-V FALLING EDGE RESPONSE 10 VCC = ±15 V Gain = 1 RF = 200 Ω RL = 150 Ω CL = 0.
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 TYPICAL CHARACTERISTICS CAPACITIVE LOAD RESPONSE 1-VOLT STEP RESPONSE 0.8 4 VCC = ±5 V RL = 150 Ω 0 CL = 0.01 µF −1 −2 −3 0.6 Gain = 1 0.4 RF = 200 Ω VCC = ±5 V RL = 150 Ω 0.2 0.0 −0.2 −0.4 −0.8 0.5 1.0 1.5 2.0 2.5 3.0 200 100 0.0 −0.
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 APPLICATION INFORMATION theory of operation The THS404x is a high-speed, operational amplifier configured in a voltage feedback architecture. It is built using a 30-V, dielectrically isolated, complementary bipolar process with NPN and PNP transistors possessing fTs of several GHz.
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 APPLICATION INFORMATION noise calculations and noise figure (continued) eRs RS en Noiseless + _ eni IN+ eno eRf RF eRg IN− RG Figure 63. Noise Model The total equivalent input noise density (eni) is calculated by using the following equation: e ni + Ǹǒ ǒ 2 e nǓ ) IN ) R Ǔ S 2 ǒ ) IN– ǒRF ø RGǓǓ 2 ǒ Ǔ ) 4 kTR s ) 4 kT R ø R F G Where: k = Boltzmann’s constant = 1.
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 APPLICATION INFORMATION noise calculations and noise figure (continued) This brings up another noise measurement usually preferred in RF applications, the noise figure (NF). Noise figure is a measure of noise degradation caused by the amplifier. The value of the source resistance must be defined and is typically 50 Ω in RF applications.
PAGE 16
SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 APPLICATION INFORMATION driving a capacitive load Driving capacitive loads with high performance amplifiers is not a problem as long as certain precautions are taken. The first is to realize that the THS404x has been internally compensated to maximize its bandwidth and slew rate performance.
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 APPLICATION INFORMATION offset voltage The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage: RF IIB− RG + − VI RS IIB+ V OO +V IO ǒ ǒ ǓǓ 1) R R F VO + "I G IB) R S ǒ ǒ ǓǓ 1) R R F "I G IB– R F Figure 67.
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 APPLICATION INFORMATION circuit layout considerations To achieve the levels of high frequency performance of the THS404x, follow proper printed-circuit board high frequency design techniques. A general set of guidelines is given below. In addition, a THS404x evaluation board is available to use as a guide for layout or for evaluating the device performance.
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 APPLICATION INFORMATION general PowerPAD design considerations (continued) DIE Side View (a) Thermal Pad DIE End View (b) Bottom View (c) NOTE A: The thermal pad is electrically isolated from all terminals in the package. Figure 69. Views of Thermally Enhanced DGN Package Although there are many ways to properly heatsink this device, the following steps illustrate the recommended approach.
PAGE 20
SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 APPLICATION INFORMATION general PowerPAD design considerations (continued) The actual thermal performance achieved with the THS404xDGN in its PowerPAD package depends on the application. In the example above, if the size of the internal ground plane is approximately 3 inches × 3 inches, then the expected thermal coefficient, θJA, is about 58.4_C/W.
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 APPLICATION INFORMATION general PowerPAD design considerations (continued) The next consideration is the package constraints. The two sources of heat within an amplifier are quiescent power and output power. The designer should never forget about the quiescent heat generated within the device, especially mutiamplifier devices.
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SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 APPLICATION INFORMATION general PowerPAD design considerations (continued) THS4042 MAXIMUM RMS OUTPUT CURRENT vs RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS | IO | − Maximum RMS Output Current − mA 200 Maximum Output Current Limit Line Package With θJA ≤ 60°C/W 180 160 140 120 100 SO-8 Package θJA = 167°C/W Low-K Test PCB 80 60 Safe Operating Area 40 VCC = ±5 V TJ = 150°C TA = 50°C Both Channels SO-8
PAGE 23
SLOS237B− MAY 1999 − REVISED FEBRUARY 2000 APPLICATION INFORMATION evaluation board An evaluation board is available for the THS4041 (literature number SLOP219) and THS4042 (literature number SLOP233). This board has been configured for very low parasitic capacitance in order to realize the full performance of the amplifier. A schematic of the evaluation board is shown in Figure 76.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 21-Mar-2013 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device THS4041CDGNR Package Package Pins Type Drawing MSOPPower PAD SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 THS4041CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 THS4041IDGNR MSOPPower PAD DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) THS4041CDGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0 THS4041CDR SOIC D 8 2500 367.0 367.0 35.0 THS4041IDGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0 THS4042CDGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0 THS4042IDGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.