Datasheet

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FEATURES

THS4022

DandDGNPackage

(TopView)

THS4021

DandDGNPackage

(TopView)

1OUTNULL

1IN–IN–

1IN+IN+

–V

CC–

CC+

NULL

2OUTV

CC+

2IN–OUT

2IN+NC

NC-Nointernalconnection

CrossSectionViewShowing

PowerPADOption(DGN)

DESCRIPTION

100

− Voltage Noise − nV//Hz

− Current Noise − pA//Hz

f − Frequency − Hz

10 100 1k 100k10k

G001

= ± 15 V and ± 5 V

= 25°C

THS4021

THS4022

SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007

www.ti.com

350-MHz LOW-NOISE HIGH-SPEED AMPLIFIERS

• Ultralow 1.5-nV/ √ Hz Voltage Noise

• High Speed:

– 350-MHz Bandwidth (G = 10, – 3 dB)

– 470-V/ μ s Slew Rate

– 40-ns Settling Time (0.1%)

• Stable at a Gain of 10 ( – 9) or Greater

• High Output Drive, I

= 100 mA (typ)

• Excellent Video Performance:

– 17-MHz Bandwidth (0.1 dB, G = 10)

– 0.02% Differential Gain

– 0.08 ° Differential Phase

VOLTAGE AND CURRENT NOISE

• Very Low Distortion:

– THD = – 68 dBc (f = 1 MHz, R

= 150 Ω )

FREQUENCY

• Wide Range of Power Supplies:

– V

= ± 5 V to ± 15 V

• Available in Standard SOIC or MSOP

PowerPAD™ Package

• Evaluation Module Available

The THS4021 and THS4022 are ultralow voltage

noise, high-speed voltage feedback amplifiers that

are ideal for applications requiring low voltage noise,

including communication and imaging. The

single-amplifier THS4021 and the dual-amplifier

THS4022 offer very good ac performance with

350-MHz bandwidth, 470-V/ μ s slew rate, and 40-ns

settling time (0.1%). The THS4021 and THS4022 are

stable at gains of 10 ( – 9) or greater. These amplifiers

have a high drive capability of 100 mA and draw only

7.8-mA supply current per channel. With total

harmonic distortion (THD) of – 68 dBc at f = 1 MHz,

Figure 1.

the THS4021 and THS4022 are ideally suited for

applications requiring low distortion.

RELATED DEVICES

DEVICE DESCRIPTION

THS4011/4012 290-MHz Low-Distortion High-Speed Amplifiers

THS4031/4032 100-MHz Low-Noise High-Speed Amplifiers

THS4061/4062 180-MHz High-Speed Amplifiers

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2 PowerPAD is a trademark of Texas Instruments.

3 All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (30 pages)

PAGE 1
THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 350-MHz LOW-NOISE HIGH-SPEED AMPLIFIERS FEATURES 1 THS4021 D and DGN Package (Top View) • Ultralow 1.5-nV/√Hz Voltage Noise • High Speed: – 350-MHz Bandwidth (G = 10, –3 dB) – 470-V/μs Slew Rate – 40-ns Settling Time (0.1%) • Stable at a Gain of 10 (–9) or Greater • High Output Drive, IO = 100 mA (typ) • Excellent Video Performance: – 17-MHz Bandwidth (0.1 dB, G = 10) – 0.02% Differential Gain – 0.
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THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 CAUTION: The THS4021 and THS4022 provide ESD protection circuitry. However, permanent damage can still occur if this device is subjected to high-energy electrostatic discharges. Proper ESD precautions are recommended to avoid any performance degradation or loss of functionality.
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THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VALUE UNIT VCC Supply voltage ±16.
PAGE 4
THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 ELECTRICAL CHARACTERISTICS (continued) at TA = 25°C, VCC = ±15 V, RL = 150 Ω (unless otherwise noted) PARAMETER Settling time to 0.1% ts Settling time to 0.
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THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 ELECTRICAL CHARACTERISTICS (continued) at TA = 25°C, VCC = ±15 V, RL = 150 Ω (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Power Supply Dual supply Supply voltage operating range VCC 33 V 10 11 TA = 25°C VCC = ±5 V Power-supply rejection ratio 7.8 TA = full range Supply current (per amplifier) PSRR ±16.5 9 TA = 25°C VCC = ±15 V ICC ±4.5 Single supply 6.7 mA 9 TA = full range 10.
PAGE 6
THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 TYPICAL CHARACTERISTICS (continued) DISTORTION vs FREQUENCY −70 2nd Harmonic −80 3rd Harmonic −90 −100 100k 1M −70 −80 −90 1M f − Frequency − Hz G008 DISTORTION vs FREQUENCY OUTPUT AMPLITUDE vs FREQUENCY OUTPUT AMPLITUDE vs FREQUENCY −70 3rd Harmonic RF = 220 Ω 1M 20 RF = 150 Ω 15 VCC = ± 15 V Gain = 10 RL = 150 Ω VO(PP) = 400 mV 10 10k 10M f − Frequency − Hz 1M 100k 10M 100M Figure 13.
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THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 TYPICAL CHARACTERISTICS (continued) 5-V STEP RESPONSE 1-V STEP RESPONSE 6 0.6 1 0 −1 VCC = ± 5 V Gain = −10 RF = 220 Ω RL = 150 Ω −2 50 0.4 0.2 0.0 VCC = ± 15 V Gain = 10 RF = 220 Ω RL = 150 Ω −0.2 −0.4 0 −2 VCC = ± 15 V Gain = 10 RF = 220 Ω RL = 150 −6 0 100 150 200 250 300 350 400 2 −4 −0.6 −3 0 4 VO − Output Voltage − V VO − Output Voltage − V 2 VO − Output Voltage − V 10-V STEP RESPONSE 0.
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THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 TYPICAL CHARACTERISTICS (continued) PSRR − Power Supply Rejection Ratio − dB Vn − Voltage Noise − nV//Hz In − Current Noise − pA//Hz 100 VCC = ± 15 V and ± 5 V TA = 25°C 10 Vn In 1 10 100 1k POWER SUPPLY REJECTION RATIO vs FREQUENCY 10k 100k 0 VCC = ±15 V & ±5 V −10 −20 −VCC −30 −40 +VCC −50 −60 −70 −80 100k 1M 10M 1G f − Frequency − Hz f − Frequency − Hz G026 G025 Figure 27.
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THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 APPLICATION INFORMATION Theory of Operation The THS402x is a high-speed operational amplifier configured in a voltage feedback architecture. It is built using a 30-V, dielectrically isolated, complementary bipolar process with NPN and PNP transistors possessing fT of several GHz. This results in an exceptionally high-performance amplifier that has a wide bandwidth, high slew rate, fast settling time, and low distortion.
PAGE 10
THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 eRs RS en Noiseless eni + _ eno IN+ eRf RF eRg IN– RG S0277-01 Figure 31. Noise Model The total equivalent input noise density (eni) is calculated by using the following equation: e ni + Ǹ ǒenǓ ) ǒIN+ 2 R Ǔ S 2 ǒ ) IN− ǒR F ø R ǓǓ G 2 ǒ ) 4 kTR s ) 4 kT R ø R F G Ǔ where: k = Boltzmann’s constant = 1.
PAGE 11
THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 Because the dominant noise components are generally the source resistance and the internal amplifier noise voltage, we can approximate noise figure as: ǒ 2 ȱ ǒen Ǔ ) ǒIN+ ȧ NF + 10logȧ1 ) 4 kTR ȧ S ȧ Ȳ R Ǔ 2 ȳ Ǔ S ȧ ȧ ȧ ȧ ȴ Figure 32 shows the noise figure graph for the THS402x.
PAGE 12
THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 Driving a Capacitive Load Driving capacitive loads with high-performance amplifiers is not a problem as long as certain precautions are taken. The first is to realize that the THS402x has been internally compensated to maximize its bandwidth and slew-rate performance.
PAGE 13
THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 Offset Voltage The output offset voltage (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the corresponding gains. The schematic and formula of Figure 35 can be used to calculate the output offset voltage. RG RF IIB– – VOS + RS + – VIO IIB+ æ R ö VOS = (± VIO ± IIB + ´ RS )ç 1 + F ÷ ± IIB - ´ RF ç RG ÷ø è S0280-01 Figure 35.
PAGE 14
THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 Circuit Layout Considerations To achieve the levels of high-frequency performance of the THS402x, follow proper printed-circuit board high-frequency design techniques. A general set of guidelines is given as follows. In addition, a THS402x evaluation board is available to use as a guide for layout or for evaluating the device performance.
PAGE 15
THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 General Thermal Pad Design Considerations The THS402x is available packaged in a thermally-enhanced DGN package, which is a member of the PowerPAD family of packages. This package is constructed using a downset leadframe upon which the die is mounted [see Figure 37(a) and Figure 37(b)]. This arrangement results in the lead frame being exposed as a thermal pad on the underside of the package [see Figure 37(c)].
PAGE 16
THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 7. Apply solder paste to the exposed thermal pad area and all of the IC terminals. 8. With these preparatory steps in place, the THS402xDGN IC is simply placed in position and run through the solder reflow operation as any standard surface-mount component. This results in a part that is properly installed. The actual thermal performance achieved with the THS402xDGN in its PowerPAD package depends on the application.
PAGE 17
THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 The next consideration is the package constraints. The two sources of heat within an amplifier are quiescent power and output power. The designer should never forget about the quiescent heat generated within the device, especially with multiamplifier devices. Because these devices have linear output stages (Class A-B), most of the heat dissipation is at low output voltages with high output currents.
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THS4021 THS4022 www.ti.
PAGE 19
THS4021 THS4022 www.ti.com SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007 Evaluation Board Evaluation boards are available for the THS4021 (literature number SLOP129) and THS4022 (literature number SLOP231). These boards have been configured for very low parasitic capacitance in order to realize the full performance of the amplifier. A schematic of the THS4021 evaluation board is shown in Figure 44.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com (4) 18-Oct-2013 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
PAGE 23
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant THS4021CDGNR MSOPPower PAD DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 THS4021IDGNR MSOPPower PAD DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 THS4021IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.
PAGE 24
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) THS4021CDGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0 THS4021IDGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0 THS4021IDR SOIC D 8 2500 367.0 367.0 35.0 THS4022CDGNR MSOP-PowerPAD DGN 8 2500 367.0 367.0 35.0 THS4022IDGNR MSOP-PowerPAD DGN 8 2500 367.0 367.0 35.
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