Datasheet

THS3120
THS3121
SLOS420E –SEPTEMBER 2003–REVISED OCTOBER 2009........................................................................................................................................ www.ti.com
PRINTED-CIRCUIT BOARD LAYOUT • Connections to other wideband devices on the
TECHNIQUES FOR OPTIMAL board may be made with short direct traces or
PERFORMANCE through onboard transmission lines. For short
connections, consider the trace and the input to
Achieving optimum performance with high frequency
the next device as a lumped capacitive load.
amplifiers, like the THS3120 and THS3121, requires
Relatively wide traces [0.05 inch (1,3 mm) to
careful attention to board layout parasitic and external
0.1 inch (2,54 mm)] should be used, preferably
component types. Recommendations that optimize
with ground and power planes opened up around
performance include:
them. Estimate the total capacitive load and
• Minimize parasitic capacitance to any ac ground
determine if isolation resistors on the outputs are
for all of the signal I/O pins. Parasitic capacitance
necessary. Low parasitic capacitive loads (less
on the output and input pins can cause instability.
than 4 pF) may not need an R
S
because the
To reduce unwanted capacitance, a window
THS3120 and THS3121 are nominally
around the signal I/O pins should be opened in all
compensated to operate with a 2-pF parasitic
of the ground and power planes around those
load. Higher parasitic capacitive loads without an
pins. Otherwise, ground and power planes should
R
S
are allowed as the signal gain increases
be unbroken elsewhere on the board.
(increasing the unloaded phase margin). If a long
• Minimize the distance [< 0.25 inch, (6,4 mm)] from
trace is required, and the 6-dB signal loss intrinsic
the power-supply pins to high frequency 0.1-μF
to a doubly-terminated transmission line is
and 100-pF decoupling capacitors. At the device
acceptable, implement a matched impedance
pins, the ground and power-plane layout should
transmission line using microstrip or stripline
not be in close proximity to the signal I/O pins.
techniques (consult an ECL design handbook for
Avoid narrow power and ground traces to
microstrip and stripline layout techniques). A 50-Ω
minimize inductance between the pins and the
environment is not necessary onboard, and in
decoupling capacitors. The power-supply
fact, a higher impedance environment improves
connections should always be decoupled with
distortion as shown in the distortion versus load
these capacitors. Larger (6.8 μF or more)
plots. With a characteristic board trace impedance
tantalum decoupling capacitors, effective at lower
based on board material and trace dimensions, a
frequency, should also be used on the main
matching series resistor into the trace from the
supply pins. These may be placed somewhat
output of the THS3120/THS3121 is used as well
farther from the device and may be shared among
as a terminating shunt resistor at the input of the
several devices in the same area of the PC board.
destination device. Remember also that the
terminating impedance is the parallel combination
• Careful selection and placement of external
of the shunt resistor and the input impedance of
components preserve the high-frequency
the destination device: this total effective
performance of the THS3120 and THS3121.
impedance should be set to match the trace
Resistors should be a very low reactance type.
impedance. If the 6-dB attenuation of a
Surface-mount resistors work best and allow a
doubly-terminated transmission line is
tighter overall layout. Again, keep the leads and
unacceptable, a long trace can be
printed circuit board (PCB) trace length as short
series-terminated at the source end only. Treat
as possible. Never use wirewound type resistors
the trace as a capacitive load in this case. This
in a high-frequency application. Because the
does not preserve signal integrity as well as a
output pin and inverting input pins are the most
doubly-terminated line. If the input impedance of
sensitive to parasitic capacitance, always position
the destination device is low, there is some signal
the feedback and series output resistors, if any, as
attenuation due to the voltage divider formed by
close as possible to the inverting input pins and
the series output into the terminating impedance.
output pins. Other network components, such as
input termination resistors, should be placed close
• Socketing a high-speed part like the THS3120 and
to the gain-setting resistors. Even with a low
THS3121 is not recommended. The additional
parasitic capacitance shunting the external
lead length and pin-to-pin capacitance introduced
resistors, excessively high resistor values can
by the socket can create an extremely
create significant time constants that can degrade
troublesome parasitic network which can make it
performance. Good axial metal-film or
almost impossible to achieve a smooth, stable
surface-mount resistors have approximately
frequency response. Best results are obtained by
0.2 pF in shunt with the resistor. For resistor
soldering the THS3120/THS3121 parts directly
values greater than 2.0 kΩ, this parasitic
onto the board.
capacitance can add a pole and/or a zero that can
effect circuit operation. Keep resistor values as
low as possible, consistent with load driving
considerations.
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