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TAS5727
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SLOS670 –NOVEMBER 2010
START/STOP PERIOD REGISTER (0x1A)
This register is used to control the soft-start and soft-stop period following an enter/exit all-channel shutdown
command or change in the PDN state. This helps reduce pops and clicks at start-up and shutdown. The times
are only approximate and vary depending on device activity level and I
2
S clock stability.
Table 17. Start/Stop Period Register (0x1A)
D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION
0 – – – – – – – SSTIMER enabled
(1)
1 – – – – – – – SSTIMER disabled
– 0 0 – – – – – Reserved
(1)
– – – 0 0 – – – No 50% duty cycle start/stop period
– – – 0 1 0 0 0 16.5-ms 50% duty cycle start/stop period
– – – 0 1 0 0 1 23.9-ms 50% duty cycle start/stop period
– – – 0 1 0 1 0 31.4-ms 50% duty cycle start/stop period
– – – 0 1 0 1 1 40.4-ms 50% duty cycle start/stop period
– – – 0 1 1 0 0 53.9-ms 50% duty cycle start/stop period
– – – 0 1 1 0 1 70.3-ms 50% duty cycle start/stop period
– – – 0 1 1 1 0 94.2-ms 50% duty cycle start/stop period
– – – 0 1 1 1 1 125.7-ms 50% duty cycle start/stop period
(1)
– – – 1 0 0 0 0 164.6-ms 50% duty cycle start/stop period
– – – 1 0 0 0 1 239.4-ms 50% duty cycle start/stop period
– – – 1 0 0 1 0 314.2-ms 50% duty cycle start/stop period
– – – 1 0 0 1 1 403.9-ms 50% duty cycle start/stop period
– – – 1 0 1 0 0 538.6-ms 50% duty cycle start/stop period
– – – 1 0 1 0 1 703.1-ms 50% duty cycle start/stop period
– – – 1 0 1 1 0 942.5-ms 50% duty cycle start/stop period
– – – 1 0 1 1 1 1256.6-ms 50% duty cycle start/stop period
– – – 1 1 0 0 0 1728.1-ms 50% duty cycle start/stop period
– – – 1 1 0 0 1 2513.6-ms 50% duty cycle start/stop period
– – – 1 1 0 1 0 3299.1-ms 50% duty cycle start/stop period
– – – 1 1 0 1 1 4241.7-ms 50% duty cycle start/stop period
– – – 1 1 1 0 0 5655.6-ms 50% duty cycle start/stop period
– – – 1 1 1 0 1 7383.7-ms 50% duty cycle start/stop period
– – – 1 1 1 1 0 9897.3-ms 50% duty cycle start/stop period
– – – 1 1 1 1 1 13,196.4-ms 50% duty cycle start/stop period
(1) Default values are in bold.
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