Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Audio amplifier 2-channel (2.1 stereo) or 4-channel (Quad) Class D HTQFP 48 (7

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Table Of Contents

FEATURES
APPLICATIONS
DESCRIPTION
- SIMPLIFIED APPLICATION DIAGRAM
- FUNCTIONAL VIEW
- DAP Process Structure
DEVICE INFORMATION
- PIN ASSIGNMENT
ABSOLUTE MAXIMUM RATINGS
THERMAL INFORMATION
RECOMMENDED OPERATING CONDITIONS
PWM OPERATION AT RECOMMENDED OPERATING CONDITIONS
PLL INPUT PARAMETERS AND EXTERNAL FILTER COMPONENTS
ELECTRICAL CHARACTERISTICS
DC Characteristics
AC Characteristics (BTL)
SERIAL AUDIO PORTS SLAVE MODE
I2C SERIAL CONTROL PORT OPERATION
RESET TIMING (RESET)
TYPICAL CHARACTERISTICS, BTL CONFIGURATION
TYPICAL CHARACTERISTICS, SE CONFIGURATION
TYPICAL CHARACTERISTICS, PBTL CONFIGURATION
DETAILED DESCRIPTION
- POWER SUPPLY
- ERROR REPORTING
- DEVICE PROTECTION SYSTEM
  - Overcurrent (OC) Protection With Current Limiting
  - Overtemperature Protection
  - Undervoltage Protection (UVP) and Power-On Reset (POR)
- SSTIMER FUNCTIONALITY
- CLOCK, AUTO DETECTION, AND PLL
- SERIAL DATA INTERFACE
- PWM Section
- SERIAL INTERFACE CONTROL AND TIMING
  - I2S Timing
  - Left-Justified
  - Right-Justified
- I2C SERIAL CONTROL INTERFACE
  - General I2C Operation
  - Single- and Multiple-Byte Transfers
  - Single-Byte Write
  - Multiple-Byte Write
  - Single-Byte Read
  - Multiple-Byte Read
- Output Mode and MUX Selection
- 2.1-Mode Support
- Single-Filter PBTL-Mode Support
- Dynamic Range Control (DRC)
- BANK SWITCHING
- 26-Bit 3.23 Number Format
- Recommended Use Model
  - Recommended Command Sequences
- CLOCK CONTROL REGISTER (0x00)
- DEVICE ID REGISTER (0x01)
- ERROR STATUS REGISTER (0x02)
- SYSTEM CONTROL REGISTER 1 (0x03)
- SERIAL DATA INTERFACE REGISTER (0x04)
- SYSTEM CONTROL REGISTER 2 (0x05)
- SOFT MUTE REGISTER (0x06)
- VOLUME REGISTERS (0x07, 0x08, 0x09, 0x0A)
- VOLUME CONFIGURATION REGISTER (0x0E)
- MODULATION LIMIT REGISTER (0x10)
- INTERCHANNEL DELAY REGISTERS (0x11, 0x12, 0x13, and 0x14)
- PWM SHUTDOWN GROUP REGISTER (0x19)
- START/STOP PERIOD REGISTER (0x1A)
- OSCILLATOR TRIM REGISTER (0x1B)
- BKND_ERR REGISTER (0x1C)
- INPUT MULTIPLEXER REGISTER (0x20)
- CHANNEL 4 SOURCE SELECT REGISTER (0x21)
- PWM OUTPUT MUX REGISTER (0x25)
- DRC CONTROL (0x46)
- BANK SWITCH AND EQ CONTROL (0x50)
Revision History

SDIN

MCLK

SCLK

LRCLK

Serial

Audio

Port

Protection

Logic

ClickandPop

Control

Digital AudioProcessor

(DAP)

SDA

SCL

4

Order

th

Noise

Shaper

and

PWM

S

R

C

SampleRate

Autodetect

andPLL

Serial

Control

Microcontroller

Based

System

Control

TerminalControl

OUT_A

OUT_B

2 HB´

FET Out

OUT_C

OUT_D

2 HB´

FET Out

B0262-06

TAS5711

www.ti.com

SLOS600A –DECEMBER 2009–REVISED AUGUST 2010

FUNCTIONAL VIEW

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